[XS] Change in coreboot[master]: cpu/x86/lapic: Fix X2APIC_ONLY regression

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/76195?usp=email )

Change subject: cpu/x86/lapic: Fix X2APIC_ONLY regression
......................................................................

cpu/x86/lapic: Fix X2APIC_ONLY regression

Some ancient CPUs may have had LAPIC disabled at power-up, so
semantically enable_lapic() should always come before attempting
to access the register banks.

With X2APIC_ONLY option it is necessary to ensure enable_lapic()
is called prior to any other lapic register space accesses,
since the XAPIC mode MMIO accessors are optimised away build-time
and CPU's do not yet initialise for X2APIC mode at reset.

Change-Id: I96eaa5c43108c802375e184e0c68b5091ca0198f
Signed-off-by: Kyösti Mälkki 
---
M src/cpu/x86/mtrr/mtrr.c
1 file changed, 2 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/76195/1

diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c
index a3a89fe..f467145 100644
--- a/src/cpu/x86/mtrr/mtrr.c
+++ b/src/cpu/x86/mtrr/mtrr.c
@@ -806,6 +806,8 @@
 {
    int address_size;

+	enable_lapic();
+
    x86_setup_fixed_mtrrs();
    address_size = cpu_phys_address_size();
    printk(BIOS_DEBUG, "apic_id 0x%x setup mtrr for CPU physical address size: %d bits\n",