Attention is currently required from: Arthur Heymans, Chen, Gang C, Christian Walter, Jincheng Li, Johnny Lin, Maximilian Brune, Nico Huber, Paul Menzel, Tim Chu.
Hello Chen, Gang C, Christian Walter, Jincheng Li, Johnny Lin, Lean Sheng Tan, Maximilian Brune, Nico Huber, Patrick Rudolph, Shuo Liu, Tim Chu, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/78332?usp=email
to look at the new patch set (#20).
Change subject: soc/intel/xeon_sp: Scan and allocate resources on all stacks ......................................................................
soc/intel/xeon_sp: Scan and allocate resources on all stacks
The code can now deal with stacks that have no resources so just hook them all up.
Intel XEON-SP FSP reports all report the state of its stacks, which comprise of PCI root bridges and their respective resources, like PCI busses, IO and MEM resources, via HOB. Parsing all of those into native coreboot structures makes it possible to handle those in a more native fashion like use PCI drivers, native helper functions, ... As opposed parsing those structures again out of the HOB each time. This makes code reuse across the tree more feasible.
An additional advantage is that Linux does not need to redo resource allocation since the one done by coreboot will be valid, which potentially decreases boot time.
TEST=intel/archercity CRB
Signed-off-by: Arthur Heymans arthur@aheymans.xyz Signed-off-by: Shuo Liu shuo.liu@intel.com Change-Id: Id72c6e4499e99df3b7ca821ab2893cbcc869dbcd --- M src/soc/intel/xeon_sp/acpi.c M src/soc/intel/xeon_sp/chip_common.c M src/soc/intel/xeon_sp/cpx/soc_util.c M src/soc/intel/xeon_sp/include/soc/util.h M src/soc/intel/xeon_sp/memmap.c M src/soc/intel/xeon_sp/skx/soc_util.c M src/soc/intel/xeon_sp/spr/soc_util.c M src/soc/intel/xeon_sp/util.c 8 files changed, 27 insertions(+), 44 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/78332/20