Change in coreboot[master]: Documentation: Add some notes about how to integrate FSP

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58886 )

Change subject: Documentation: Add some notes about how to integrate FSP
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Documentation: Add some notes about how to integrate FSP

While we don't _want_ FSP, we can't get around it sometimes.  But when
using it, we can still try to establish best practices to make life
easier for everybody.

Change-Id: I4efd273e4141dc6dc4cf8bdebda9cffd0d7cc1a1
Signed-off-by: Patrick Georgi 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58886
Tested-by: build bot (Jenkins) 
Reviewed-by:  Felix Singer 
---
M Documentation/soc/intel/fsp/index.md
1 file changed, 12 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
   Felix Singer: Looks good to me, approved

diff --git a/Documentation/soc/intel/fsp/index.md b/Documentation/soc/intel/fsp/index.md
index 912c44b..feeb5e9 100644
--- a/Documentation/soc/intel/fsp/index.md
+++ b/Documentation/soc/intel/fsp/index.md
@@ -2,6 +2,18 @@

This section contains documentation about Intel-FSP in public domain.

+## Integration Guidelines
+
+Some guiding principles when working on the glue to integrate FSP into
+coreboot, e.g. on how to configure a board in devicetree when that affects
+the way FSP works:
+
+* It should be possible to replace FSP based boot with a native coreboot
+  implementation for a given chipset without touching the mainboard code.
+* The devicetree configures coreboot and part of what coreboot does with the
+  information is setting some FSP UPDs. The devicetree isn't supposed to
+  directly configure FSP.
+
 ## Bugs
 As Intel doesn't even list known bugs, they are collected here until
 those are fixed. If possible a workaround is described here as well.