Change in coreboot[master]: southbridge/intel/common: Replace outb with post_code in finalize.c

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/43596 )

Change subject: southbridge/intel/common: Replace outb with post_code in finalize.c
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southbridge/intel/common: Replace outb with post_code in finalize.c

The outb() call is replaced with the post_code()

The post_codes.h is replaced with console.h since console.h
includes both the post_code definition and post_codes.h

Change-Id: I21345260e86de30614c416e2f509bd77b9e00cb7
Signed-off-by: Sindhoor Tilak 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43596
Tested-by: build bot (Jenkins) 
Reviewed-by: Arthur Heymans 
---
M src/southbridge/intel/common/finalize.c
1 file changed, 2 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Arthur Heymans: Looks good to me, approved

diff --git a/src/southbridge/intel/common/finalize.c b/src/southbridge/intel/common/finalize.c
index 00c3a0e..59d4297 100644
--- a/src/southbridge/intel/common/finalize.c
+++ b/src/southbridge/intel/common/finalize.c
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

#include <arch/io.h>
-#include <console/post_codes.h>
+#include <console/console.h>
 #include <device/pci_ops.h>
 #include <southbridge/intel/common/pmbase.h>
 #include <southbridge/intel/common/pmutil.h>
@@ -48,5 +48,5 @@

write_pmbase16(TCO1_CNT, read_pmbase16(TCO1_CNT) | TCO_LOCK);

-	outb(POST_OS_BOOT, CONFIG_POST_IO_PORT);
+	post_code(POST_OS_BOOT);
 }