Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46251 )
Change subject: mb/purism/librem_skl: Drop DQ and DQS byte maps ......................................................................
mb/purism/librem_skl: Drop DQ and DQS byte maps
These settings are not necessary for DDR4 and can be dropped.
Change-Id: I1946be239f0c90db995a60570474039cef45cfa9 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/purism/librem_skl/romstage.c 1 file changed, 0 insertions(+), 26 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/46251/1
diff --git a/src/mainboard/purism/librem_skl/romstage.c b/src/mainboard/purism/librem_skl/romstage.c index 7be8325..4982836 100644 --- a/src/mainboard/purism/librem_skl/romstage.c +++ b/src/mainboard/purism/librem_skl/romstage.c @@ -5,28 +5,6 @@ #include <spd_bin.h> #include <string.h>
-static void mainboard_fill_dq_map_data(void *dq_map_ch0, void *dq_map_ch1) -{ - /* DQ byte map */ - const u8 dq_map[2][12] = { - { 0x0F, 0xF0, 0x00, 0xF0, 0x0F, 0xF0, - 0x0F, 0x00, 0xFF, 0x00, 0xFF, 0x00 }, - { 0x33, 0xCC, 0x00, 0xCC, 0x33, 0xCC, - 0x33, 0x00, 0xFF, 0x00, 0xFF, 0x00 } }; - memcpy(dq_map_ch0, dq_map[0], sizeof(dq_map[0])); - memcpy(dq_map_ch1, dq_map[1], sizeof(dq_map[1])); -} - -static void mainboard_fill_dqs_map_data(void *dqs_map_ch0, void *dqs_map_ch1) -{ - /* DQS CPU<>DRAM map */ - const u8 dqs_map[2][8] = { - { 0, 1, 3, 2, 4, 5, 6, 7 }, - { 1, 0, 4, 5, 2, 3, 6, 7 } }; - memcpy(dqs_map_ch0, dqs_map[0], sizeof(dqs_map[0])); - memcpy(dqs_map_ch1, dqs_map[1], sizeof(dqs_map[1])); -} - static void mainboard_fill_rcomp_res_data(void *rcomp_ptr) { /* Rcomp resistor */ @@ -54,10 +32,6 @@ dump_spd_info(&blk); assert(blk.spd_array[0][0] != 0);
- mainboard_fill_dq_map_data(&mem_cfg->DqByteMapCh0, - &mem_cfg->DqByteMapCh1); - mainboard_fill_dqs_map_data(&mem_cfg->DqsMapCpu2DramCh0, - &mem_cfg->DqsMapCpu2DramCh1); mainboard_fill_rcomp_res_data(&mem_cfg->RcompResistor); mainboard_fill_rcomp_strength_data(&mem_cfg->RcompTarget);
Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46251 )
Change subject: mb/purism/librem_skl: Drop DQ and DQS byte maps ......................................................................
Patch Set 1: Code-Review+2
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46251 )
Change subject: mb/purism/librem_skl: Drop DQ and DQS byte maps ......................................................................
Patch Set 1: Code-Review+2
Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46251 )
Change subject: mb/purism/librem_skl: Drop DQ and DQS byte maps ......................................................................
mb/purism/librem_skl: Drop DQ and DQS byte maps
These settings are not necessary for DDR4 and can be dropped.
Change-Id: I1946be239f0c90db995a60570474039cef45cfa9 Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/46251 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Matt DeVillier matt.devillier@gmail.com Reviewed-by: Michael Niewöhner foss@mniewoehner.de --- M src/mainboard/purism/librem_skl/romstage.c 1 file changed, 0 insertions(+), 26 deletions(-)
Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved Michael Niewöhner: Looks good to me, approved
diff --git a/src/mainboard/purism/librem_skl/romstage.c b/src/mainboard/purism/librem_skl/romstage.c index 7be8325..4982836 100644 --- a/src/mainboard/purism/librem_skl/romstage.c +++ b/src/mainboard/purism/librem_skl/romstage.c @@ -5,28 +5,6 @@ #include <spd_bin.h> #include <string.h>
-static void mainboard_fill_dq_map_data(void *dq_map_ch0, void *dq_map_ch1) -{ - /* DQ byte map */ - const u8 dq_map[2][12] = { - { 0x0F, 0xF0, 0x00, 0xF0, 0x0F, 0xF0, - 0x0F, 0x00, 0xFF, 0x00, 0xFF, 0x00 }, - { 0x33, 0xCC, 0x00, 0xCC, 0x33, 0xCC, - 0x33, 0x00, 0xFF, 0x00, 0xFF, 0x00 } }; - memcpy(dq_map_ch0, dq_map[0], sizeof(dq_map[0])); - memcpy(dq_map_ch1, dq_map[1], sizeof(dq_map[1])); -} - -static void mainboard_fill_dqs_map_data(void *dqs_map_ch0, void *dqs_map_ch1) -{ - /* DQS CPU<>DRAM map */ - const u8 dqs_map[2][8] = { - { 0, 1, 3, 2, 4, 5, 6, 7 }, - { 1, 0, 4, 5, 2, 3, 6, 7 } }; - memcpy(dqs_map_ch0, dqs_map[0], sizeof(dqs_map[0])); - memcpy(dqs_map_ch1, dqs_map[1], sizeof(dqs_map[1])); -} - static void mainboard_fill_rcomp_res_data(void *rcomp_ptr) { /* Rcomp resistor */ @@ -54,10 +32,6 @@ dump_spd_info(&blk); assert(blk.spd_array[0][0] != 0);
- mainboard_fill_dq_map_data(&mem_cfg->DqByteMapCh0, - &mem_cfg->DqByteMapCh1); - mainboard_fill_dqs_map_data(&mem_cfg->DqsMapCpu2DramCh0, - &mem_cfg->DqsMapCpu2DramCh1); mainboard_fill_rcomp_res_data(&mem_cfg->RcompResistor); mainboard_fill_rcomp_strength_data(&mem_cfg->RcompTarget);
-
Angel Pons (Code Review) -
Matt DeVillier (Code Review)
-
Michael Niewöhner (Code Review)