Attention is currently required from: Anastasios Koutian, Angel Pons.
Nico Huber has posted comments on this change by Anastasios Koutian. ( https://review.coreboot.org/c/coreboot/+/83270?usp=email )
The change is no longer submittable: All-Comments-Resolved is unsatisfied now.
Change subject: cpu/intel/model_206ax: Allow package power limit clamping ......................................................................
Patch Set 5:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83270/comment/8fb366d5_443347e5?usp... : PS5, Line 8:
"Package Clamping Limitation #1 (bit 16): Allow going below OS-requested P/T state setting during time window specified by bits 23:17." "Package Clamping Limitation #2 (bit 48): Allow going below OS-requested P/T state setting during time window specified by bits 23:17."
It's these vague descriptions that made me ask in the first place. Wouldn't have asked if it was easy to understand :D With this description and your tests alone, don't you wonder what the enable bit does vs the clamping bit?
So I looked it up once more: the enable bit tells it to obey the limit in turbo states. The clamping bit tells it to obey the limit in all states (i.e. also non-turbo states).
Please put that information into the commit message. That's why I asked here.