Change in coreboot[master]: soc/intel: Allow enable/disable ME via CMOS

[Sean Rhodes (Code Review)]

Attention is currently required from: Furquan Shaikh, Paul Menzel, Rizwan Qureshi, Subrata Banik, Angel Pons, Sridhar Siricilla, Arthur Heymans, Patrick Rudolph, Tim Crawford, Sean Rhodes, SRIDHAR SIRICILLA, Tim Wawrzynczak, Evgeny Zinoviev.
Hello build bot (Jenkins), Nico Huber, SRIDHAR SIRICILLA, Furquan Shaikh, Rizwan Qureshi, Tim Wawrzynczak, Sridhar Siricilla, Subrata Banik, Evgeny Zinoviev, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/52800

to look at the new patch set (#73).

Change subject: soc/intel: Allow enable/disable ME via CMOS
......................................................................

soc/intel: Allow enable/disable ME via CMOS

Add .enable method that will set the CSME state. The state is based on
the new CMOS option me_state, with values of 0 and 1. The method is very
stable when switching between different firmware platforms.

State 1 will result in:
ME: Current Working State   : 4
ME: Current Operation State : 1
ME: Current Operation Mode  : 3
ME: Error Code              : 2

State 0 will result in:
ME: Current Working State   : 5
ME: Current Operation State : 1
ME: Current Operation Mode  : 0
ME: Error Code              : 0

Tested on:
KBL-R: i7-8550u
CML: i3-10110u, i7-10710u
TGL: i3-1110G4, i7-1165G7

Signed-off-by: Sean Rhodes 
Change-Id: I374db3b7c0ded71cdc18f27970252fec7220cc20
---
M src/soc/intel/common/block/cse/cse.c
M src/soc/intel/common/block/include/intelblocks/cse.h
2 files changed, 129 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/52800/73