Change in coreboot[master]: mb/google/zork: Drop RAM_ID configuration from romstage gpio table
Hello Aaron Durbin,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/42720
to review the following change.
Change subject: mb/google/zork: Drop RAM_ID configuration from romstage gpio table ......................................................................
mb/google/zork: Drop RAM_ID configuration from romstage gpio table
RAM_ID GPIOs are configured by ABL based on the information added to APCB. Coreboot does not need to configure these pads. This change drops the RAM_ID configuration from trembyle baseboard. Dalboz never really configured RAM_IDs in coreboot.
BUG=b:154351731
Signed-off-by: Furquan Shaikh furquan@google.com Change-Id: Ie1dfcc3c185304d917ab4386920445ba0119ac69 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+... Commit-Queue: Furquan Shaikh furquan@chromium.org Tested-by: Furquan Shaikh furquan@chromium.org Reviewed-by: Aaron Durbin adurbin@google.com --- M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c 1 file changed, 0 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/42720/1
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c index c3e1e42..b32312f 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c @@ -28,20 +28,10 @@ PAD_GPO(GPIO_68, HIGH), /* EN_PWR_CAMERA - reset */ PAD_GPO(GPIO_76, LOW), - /* RAM_ID_4 */ - PAD_GPI(GPIO_84, PULL_NONE), /* CLK_REQ0_L - WIFI */ PAD_NF(GPIO_92, CLK_REQ0_L, PULL_UP), /* CLK_REQ1_L - SD Card */ PAD_NF(GPIO_115, CLK_REQ1_L, PULL_UP), - /* RAM_ID_3 */ - PAD_GPI(GPIO_116, PULL_NONE), - /* RAM_ID_1 */ - PAD_GPI(GPIO_120, PULL_NONE), - /* RAM_ID_0 */ - PAD_GPI(GPIO_121, PULL_NONE), - /* RAM_ID_2 */ - PAD_GPI(GPIO_131, PULL_NONE), /* CLK_REQ4_L - SSD */ PAD_NF(GPIO_132, CLK_REQ4_L, PULL_UP), /* BIOS_FLASH_WP_ODL */
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42720 )
Change subject: mb/google/zork: Drop RAM_ID configuration from romstage gpio table ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42720/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42720/1//COMMIT_MSG@10 PS1, Line 10: C Build is complaining about capitalized coreboot.
Hello build bot (Jenkins), Aaron Durbin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42720
to look at the new patch set (#2).
Change subject: mb/google/zork: Drop RAM_ID configuration from romstage gpio table ......................................................................
mb/google/zork: Drop RAM_ID configuration from romstage gpio table
RAM_ID GPIOs are configured by ABL based on the information added to APCB. coreboot does not need to configure these pads. This change drops the RAM_ID configuration from trembyle baseboard. Dalboz never really configured RAM_IDs in coreboot.
BUG=b:154351731
Signed-off-by: Furquan Shaikh furquan@google.com Change-Id: Ie1dfcc3c185304d917ab4386920445ba0119ac69 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+... Commit-Queue: Furquan Shaikh furquan@chromium.org Tested-by: Furquan Shaikh furquan@chromium.org Reviewed-by: Aaron Durbin adurbin@google.com --- M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c 1 file changed, 0 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/42720/2
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42720 )
Change subject: mb/google/zork: Drop RAM_ID configuration from romstage gpio table ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42720/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42720/1//COMMIT_MSG@10 PS1, Line 10: C
Build is complaining about capitalized coreboot.
Done.
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42720 )
Change subject: mb/google/zork: Drop RAM_ID configuration from romstage gpio table ......................................................................
Patch Set 2: Code-Review+2
Furquan Shaikh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42720 )
Change subject: mb/google/zork: Drop RAM_ID configuration from romstage gpio table ......................................................................
mb/google/zork: Drop RAM_ID configuration from romstage gpio table
RAM_ID GPIOs are configured by ABL based on the information added to APCB. coreboot does not need to configure these pads. This change drops the RAM_ID configuration from trembyle baseboard. Dalboz never really configured RAM_IDs in coreboot.
BUG=b:154351731
Signed-off-by: Furquan Shaikh furquan@google.com Change-Id: Ie1dfcc3c185304d917ab4386920445ba0119ac69 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+... Commit-Queue: Furquan Shaikh furquan@chromium.org Tested-by: Furquan Shaikh furquan@chromium.org Reviewed-by: Aaron Durbin adurbin@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/42720 Reviewed-by: Aaron Durbin adurbin@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c 1 file changed, 0 insertions(+), 10 deletions(-)
Approvals: build bot (Jenkins): Verified Aaron Durbin: Looks good to me, approved
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c index c3e1e42..b32312f 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c @@ -28,20 +28,10 @@ PAD_GPO(GPIO_68, HIGH), /* EN_PWR_CAMERA - reset */ PAD_GPO(GPIO_76, LOW), - /* RAM_ID_4 */ - PAD_GPI(GPIO_84, PULL_NONE), /* CLK_REQ0_L - WIFI */ PAD_NF(GPIO_92, CLK_REQ0_L, PULL_UP), /* CLK_REQ1_L - SD Card */ PAD_NF(GPIO_115, CLK_REQ1_L, PULL_UP), - /* RAM_ID_3 */ - PAD_GPI(GPIO_116, PULL_NONE), - /* RAM_ID_1 */ - PAD_GPI(GPIO_120, PULL_NONE), - /* RAM_ID_0 */ - PAD_GPI(GPIO_121, PULL_NONE), - /* RAM_ID_2 */ - PAD_GPI(GPIO_131, PULL_NONE), /* CLK_REQ4_L - SSD */ PAD_NF(GPIO_132, CLK_REQ4_L, PULL_UP), /* BIOS_FLASH_WP_ODL */
-
Aaron Durbin (Code Review) -
Furquan Shaikh (Code Review)