[M] Change in coreboot[main]: soc/intel/ptl: Add GPE1 support in pmutil.c

[Cliff Huang (Code Review)]

Attention is currently required from: Kapil Porwal, Pranava Y N, Subrata Banik.

Hello Kapil Porwal, Pranava Y N, Subrata Banik,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/84410?usp=email

to look at the new patch set (#2).

Change subject: soc/intel/ptl: Add GPE1 support in pmutil.c
......................................................................

soc/intel/ptl: Add GPE1 support in pmutil.c

This change is to add the required GPE1 override functions for PTL.
The override functions are called in Intel common pmclib.c. NOTE that
GPE1 bits are SOC-specific and they are related to GPE0 events.

1. When CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_HAVE_GPE1 is set, the SOC
GPE1 override functions soc_pmc_disable_std_gpe1() and
soc_pmc_enable_std_gpe1() are required in order to configure GPE1 bits
properly according to the corresponding GPE0 bits.
2. The mapping for GPE1 bits to their readable string is also provided

BUG=b:362310295
TEST=This cannot be tested directly. Build with
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_HAVE_GPE1 in google/fatcat or
inte/ptlrvp. Boot to OS, Check both GPE0 and GPE1 EN bits.

Signed-off-by: Cliff Huang 
Change-Id: Ia79c49d399eff4b2f6978323b2f5e2bb167d8638
---
M src/soc/intel/pantherlake/pmutil.c
1 file changed, 112 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/84410/2