Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37855 )
Change subject: mb/**/dsdt.asl: Remove outdated sleepstates.asl comment ......................................................................
mb/**/dsdt.asl: Remove outdated sleepstates.asl comment
Previously, each Intel chipset had its own sleepstates.asl file. However, this is no longer the case, so drop these comments.
Change-Id: I50aba6e74f41e2fa498375b5eb6b7e993d06bcac Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/apple/macbook21/dsdt.asl M src/mainboard/asrock/g41c-gs/dsdt.asl M src/mainboard/asrock/h110m/dsdt.asl M src/mainboard/asus/p5gc-mx/dsdt.asl M src/mainboard/asus/p5qc/dsdt.asl M src/mainboard/asus/p5ql-em/dsdt.asl M src/mainboard/asus/p5qpl-am/dsdt.asl M src/mainboard/facebook/fbg1701/dsdt.asl M src/mainboard/facebook/monolith/dsdt.asl M src/mainboard/foxconn/d41s/dsdt.asl M src/mainboard/foxconn/g41s-k/dsdt.asl M src/mainboard/getac/p470/dsdt.asl M src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl M src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl M src/mainboard/google/auron/dsdt.asl M src/mainboard/google/beltino/dsdt.asl M src/mainboard/google/butterfly/dsdt.asl M src/mainboard/google/cyan/dsdt.asl M src/mainboard/google/dragonegg/dsdt.asl M src/mainboard/google/drallion/dsdt.asl M src/mainboard/google/eve/dsdt.asl M src/mainboard/google/fizz/dsdt.asl M src/mainboard/google/glados/dsdt.asl M src/mainboard/google/hatch/dsdt.asl M src/mainboard/google/jecht/dsdt.asl M src/mainboard/google/link/dsdt.asl M src/mainboard/google/octopus/dsdt.asl M src/mainboard/google/parrot/dsdt.asl M src/mainboard/google/poppy/dsdt.asl M src/mainboard/google/rambi/dsdt.asl M src/mainboard/google/reef/dsdt.asl M src/mainboard/google/sarien/dsdt.asl M src/mainboard/google/slippy/dsdt.asl M src/mainboard/google/stout/dsdt.asl M src/mainboard/ibase/mb899/dsdt.asl M src/mainboard/intel/apollolake_rvp/dsdt.asl M src/mainboard/intel/baskingridge/dsdt.asl M src/mainboard/intel/cannonlake_rvp/dsdt.asl M src/mainboard/intel/coffeelake_rvp/dsdt.asl M src/mainboard/intel/d510mo/dsdt.asl M src/mainboard/intel/d945gclf/dsdt.asl M src/mainboard/intel/dg41wv/dsdt.asl M src/mainboard/intel/dg43gt/dsdt.asl M src/mainboard/intel/emeraldlake2/dsdt.asl M src/mainboard/intel/glkrvp/dsdt.asl M src/mainboard/intel/harcuvar/dsdt.asl M src/mainboard/intel/icelake_rvp/dsdt.asl M src/mainboard/intel/kblrvp/dsdt.asl M src/mainboard/intel/kunimitsu/dsdt.asl M src/mainboard/intel/leafhill/dsdt.asl M src/mainboard/intel/minnow3/dsdt.asl M src/mainboard/intel/saddlebrook/dsdt.asl M src/mainboard/intel/strago/dsdt.asl M src/mainboard/intel/wtm2/dsdt.asl M src/mainboard/kontron/986lcd-m/dsdt.asl M src/mainboard/kontron/ktqm77/dsdt.asl M src/mainboard/lenovo/t400/dsdt.asl M src/mainboard/lenovo/t410/dsdt.asl M src/mainboard/lenovo/t420/dsdt.asl M src/mainboard/lenovo/t420s/dsdt.asl M src/mainboard/lenovo/t430s/dsdt.asl M src/mainboard/lenovo/t520/dsdt.asl M src/mainboard/lenovo/t530/dsdt.asl M src/mainboard/lenovo/t60/dsdt.asl M src/mainboard/lenovo/thinkcentre_a58/dsdt.asl M src/mainboard/lenovo/x131e/dsdt.asl M src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl M src/mainboard/lenovo/x200/dsdt.asl M src/mainboard/lenovo/x201/dsdt.asl M src/mainboard/lenovo/x220/dsdt.asl M src/mainboard/lenovo/x230/dsdt.asl M src/mainboard/lenovo/x60/dsdt.asl M src/mainboard/packardbell/ms2290/dsdt.asl M src/mainboard/portwell/m107/dsdt.asl M src/mainboard/purism/librem_bdw/dsdt.asl M src/mainboard/purism/librem_skl/dsdt.asl M src/mainboard/razer/blade_stealth_kbl/dsdt.asl M src/mainboard/roda/rk886ex/dsdt.asl M src/mainboard/roda/rk9/dsdt.asl M src/mainboard/roda/rv11/dsdt.asl M src/mainboard/samsung/lumpy/dsdt.asl M src/mainboard/samsung/stumpy/dsdt.asl M src/mainboard/scaleway/tagada/dsdt.asl M src/mainboard/siemens/mc_apl1/dsdt.asl M src/mainboard/supermicro/x11-lga1151-series/dsdt.asl M src/mainboard/up/squared/dsdt.asl 86 files changed, 3 insertions(+), 86 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/37855/1
diff --git a/src/mainboard/apple/macbook21/dsdt.asl b/src/mainboard/apple/macbook21/dsdt.asl index 40af217..ac519c4 100644 --- a/src/mainboard/apple/macbook21/dsdt.asl +++ b/src/mainboard/apple/macbook21/dsdt.asl @@ -45,6 +45,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/asrock/g41c-gs/dsdt.asl b/src/mainboard/asrock/g41c-gs/dsdt.asl index 31e7c10..cddaa3a 100644 --- a/src/mainboard/asrock/g41c-gs/dsdt.asl +++ b/src/mainboard/asrock/g41c-gs/dsdt.asl @@ -37,6 +37,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/asrock/h110m/dsdt.asl b/src/mainboard/asrock/h110m/dsdt.asl index 0b3baf6..1f3537e 100644 --- a/src/mainboard/asrock/h110m/dsdt.asl +++ b/src/mainboard/asrock/h110m/dsdt.asl @@ -47,7 +47,6 @@ #include "acpi/dptf.asl" }
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific diff --git a/src/mainboard/asus/p5gc-mx/dsdt.asl b/src/mainboard/asus/p5gc-mx/dsdt.asl index 66f0efe..9e5d920 100644 --- a/src/mainboard/asus/p5gc-mx/dsdt.asl +++ b/src/mainboard/asus/p5gc-mx/dsdt.asl @@ -49,6 +49,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/asus/p5qc/dsdt.asl b/src/mainboard/asus/p5qc/dsdt.asl index b9b5adc..75e3b98 100644 --- a/src/mainboard/asus/p5qc/dsdt.asl +++ b/src/mainboard/asus/p5qc/dsdt.asl @@ -37,6 +37,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/asus/p5ql-em/dsdt.asl b/src/mainboard/asus/p5ql-em/dsdt.asl index 632c6cb..07f19ec 100644 --- a/src/mainboard/asus/p5ql-em/dsdt.asl +++ b/src/mainboard/asus/p5ql-em/dsdt.asl @@ -36,6 +36,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/asus/p5qpl-am/dsdt.asl b/src/mainboard/asus/p5qpl-am/dsdt.asl index 31e7c10..cddaa3a 100644 --- a/src/mainboard/asus/p5qpl-am/dsdt.asl +++ b/src/mainboard/asus/p5qpl-am/dsdt.asl @@ -37,6 +37,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/facebook/fbg1701/dsdt.asl b/src/mainboard/facebook/fbg1701/dsdt.asl index 518e249..20ef1e8 100644 --- a/src/mainboard/facebook/fbg1701/dsdt.asl +++ b/src/mainboard/facebook/fbg1701/dsdt.asl @@ -44,7 +44,7 @@ } }
- /* Chipset specific sleep states */ + /* Mainboard specific sleep states */ #include "acpi/sleepstates.asl" #include "acpi/mainboard.asl" } diff --git a/src/mainboard/facebook/monolith/dsdt.asl b/src/mainboard/facebook/monolith/dsdt.asl index 2f00110..f8cfaa6 100644 --- a/src/mainboard/facebook/monolith/dsdt.asl +++ b/src/mainboard/facebook/monolith/dsdt.asl @@ -46,7 +46,6 @@ #include "acpi/dptf.asl" }
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific diff --git a/src/mainboard/foxconn/d41s/dsdt.asl b/src/mainboard/foxconn/d41s/dsdt.asl index e07ecc2..a0e9b62 100644 --- a/src/mainboard/foxconn/d41s/dsdt.asl +++ b/src/mainboard/foxconn/d41s/dsdt.asl @@ -37,6 +37,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/foxconn/g41s-k/dsdt.asl b/src/mainboard/foxconn/g41s-k/dsdt.asl index 31e7c10..cddaa3a 100644 --- a/src/mainboard/foxconn/g41s-k/dsdt.asl +++ b/src/mainboard/foxconn/g41s-k/dsdt.asl @@ -37,6 +37,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/getac/p470/dsdt.asl b/src/mainboard/getac/p470/dsdt.asl index 4e75968..c4368bd 100644 --- a/src/mainboard/getac/p470/dsdt.asl +++ b/src/mainboard/getac/p470/dsdt.asl @@ -54,6 +54,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl b/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl index afc5386..3027f58 100644 --- a/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl +++ b/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl @@ -49,6 +49,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl b/src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl index 31e7c10..cddaa3a 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl +++ b/src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl @@ -37,6 +37,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/google/auron/dsdt.asl b/src/mainboard/google/auron/dsdt.asl index 9a5dcc7..3f0b23f 100644 --- a/src/mainboard/google/auron/dsdt.asl +++ b/src/mainboard/google/auron/dsdt.asl @@ -50,7 +50,6 @@ // Chrome OS specific #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific diff --git a/src/mainboard/google/beltino/dsdt.asl b/src/mainboard/google/beltino/dsdt.asl index 7b369d8..bedac16 100644 --- a/src/mainboard/google/beltino/dsdt.asl +++ b/src/mainboard/google/beltino/dsdt.asl @@ -52,6 +52,5 @@ // Chrome OS specific #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/google/butterfly/dsdt.asl b/src/mainboard/google/butterfly/dsdt.asl index 8a9d71b..72e6c99 100644 --- a/src/mainboard/google/butterfly/dsdt.asl +++ b/src/mainboard/google/butterfly/dsdt.asl @@ -53,6 +53,5 @@
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/google/cyan/dsdt.asl b/src/mainboard/google/cyan/dsdt.asl index 7aa62f8..1abc5e3 100644 --- a/src/mainboard/google/cyan/dsdt.asl +++ b/src/mainboard/google/cyan/dsdt.asl @@ -61,7 +61,6 @@ } #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
#include "acpi/mainboard.asl" diff --git a/src/mainboard/google/dragonegg/dsdt.asl b/src/mainboard/google/dragonegg/dsdt.asl index 4318dc3..9a8ea5b 100644 --- a/src/mainboard/google/dragonegg/dsdt.asl +++ b/src/mainboard/google/dragonegg/dsdt.asl @@ -48,7 +48,6 @@ #include <vendorcode/google/chromeos/acpi/chromeos.asl> #endif
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Chrome OS Embedded Controller */ diff --git a/src/mainboard/google/drallion/dsdt.asl b/src/mainboard/google/drallion/dsdt.asl index 0a092cf..5d3309f 100644 --- a/src/mainboard/google/drallion/dsdt.asl +++ b/src/mainboard/google/drallion/dsdt.asl @@ -53,7 +53,6 @@ #include <vendorcode/google/chromeos/acpi/amac.asl> #endif
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Low power idle table */ diff --git a/src/mainboard/google/eve/dsdt.asl b/src/mainboard/google/eve/dsdt.asl index 3e9d570..e337743 100644 --- a/src/mainboard/google/eve/dsdt.asl +++ b/src/mainboard/google/eve/dsdt.asl @@ -47,7 +47,6 @@ /* Chrome OS specific */ #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Chrome OS Embedded Controller */ diff --git a/src/mainboard/google/fizz/dsdt.asl b/src/mainboard/google/fizz/dsdt.asl index 44d544c..247da7b 100644 --- a/src/mainboard/google/fizz/dsdt.asl +++ b/src/mainboard/google/fizz/dsdt.asl @@ -47,7 +47,6 @@ /* Chrome OS specific */ #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Chrome OS Embedded Controller */ diff --git a/src/mainboard/google/glados/dsdt.asl b/src/mainboard/google/glados/dsdt.asl index 6dab56e..188b119 100644 --- a/src/mainboard/google/glados/dsdt.asl +++ b/src/mainboard/google/glados/dsdt.asl @@ -48,7 +48,6 @@ // Chrome OS specific #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific diff --git a/src/mainboard/google/hatch/dsdt.asl b/src/mainboard/google/hatch/dsdt.asl index 6247829..f44030c 100644 --- a/src/mainboard/google/hatch/dsdt.asl +++ b/src/mainboard/google/hatch/dsdt.asl @@ -51,7 +51,6 @@ #include <vendorcode/google/chromeos/acpi/chromeos.asl> #endif
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Low power idle table */ diff --git a/src/mainboard/google/jecht/dsdt.asl b/src/mainboard/google/jecht/dsdt.asl index fb8abe7..0db09df 100644 --- a/src/mainboard/google/jecht/dsdt.asl +++ b/src/mainboard/google/jecht/dsdt.asl @@ -51,7 +51,6 @@ // Chrome OS specific #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific diff --git a/src/mainboard/google/link/dsdt.asl b/src/mainboard/google/link/dsdt.asl index 4c23e7d..56b1245 100644 --- a/src/mainboard/google/link/dsdt.asl +++ b/src/mainboard/google/link/dsdt.asl @@ -54,6 +54,5 @@
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/google/octopus/dsdt.asl b/src/mainboard/google/octopus/dsdt.asl index 2b6c33f..b193909 100644 --- a/src/mainboard/google/octopus/dsdt.asl +++ b/src/mainboard/google/octopus/dsdt.asl @@ -44,7 +44,6 @@ /* Chrome OS specific */ #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Chrome OS Embedded Controller */ diff --git a/src/mainboard/google/parrot/dsdt.asl b/src/mainboard/google/parrot/dsdt.asl index 0465ced..041ca96 100644 --- a/src/mainboard/google/parrot/dsdt.asl +++ b/src/mainboard/google/parrot/dsdt.asl @@ -54,6 +54,5 @@
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/google/poppy/dsdt.asl b/src/mainboard/google/poppy/dsdt.asl index 7e0eb9a..781882c 100644 --- a/src/mainboard/google/poppy/dsdt.asl +++ b/src/mainboard/google/poppy/dsdt.asl @@ -54,7 +54,6 @@ /* Chrome OS specific */ #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Chrome OS Embedded Controller */ diff --git a/src/mainboard/google/rambi/dsdt.asl b/src/mainboard/google/rambi/dsdt.asl index 2393830..bd675d7 100644 --- a/src/mainboard/google/rambi/dsdt.asl +++ b/src/mainboard/google/rambi/dsdt.asl @@ -47,7 +47,6 @@
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
#include "acpi/mainboard.asl" diff --git a/src/mainboard/google/reef/dsdt.asl b/src/mainboard/google/reef/dsdt.asl index 29b8165..6de58d8 100644 --- a/src/mainboard/google/reef/dsdt.asl +++ b/src/mainboard/google/reef/dsdt.asl @@ -44,7 +44,6 @@ /* Chrome OS specific */ #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Chrome OS Embedded Controller */ diff --git a/src/mainboard/google/sarien/dsdt.asl b/src/mainboard/google/sarien/dsdt.asl index 9a5c787..40dc2ce 100644 --- a/src/mainboard/google/sarien/dsdt.asl +++ b/src/mainboard/google/sarien/dsdt.asl @@ -53,7 +53,6 @@ #include <vendorcode/google/chromeos/acpi/amac.asl> #endif
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Low power idle table */ diff --git a/src/mainboard/google/slippy/dsdt.asl b/src/mainboard/google/slippy/dsdt.asl index 6c45ea9..33eced4 100644 --- a/src/mainboard/google/slippy/dsdt.asl +++ b/src/mainboard/google/slippy/dsdt.asl @@ -63,6 +63,5 @@ // Chrome OS specific #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/google/stout/dsdt.asl b/src/mainboard/google/stout/dsdt.asl index 580ca16..9d10acf 100644 --- a/src/mainboard/google/stout/dsdt.asl +++ b/src/mainboard/google/stout/dsdt.asl @@ -54,6 +54,5 @@
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/ibase/mb899/dsdt.asl b/src/mainboard/ibase/mb899/dsdt.asl index 31b67a7..2366132 100644 --- a/src/mainboard/ibase/mb899/dsdt.asl +++ b/src/mainboard/ibase/mb899/dsdt.asl @@ -46,6 +46,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/apollolake_rvp/dsdt.asl b/src/mainboard/intel/apollolake_rvp/dsdt.asl index 9dd8879..ba17f28 100644 --- a/src/mainboard/intel/apollolake_rvp/dsdt.asl +++ b/src/mainboard/intel/apollolake_rvp/dsdt.asl @@ -32,7 +32,6 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
} diff --git a/src/mainboard/intel/baskingridge/dsdt.asl b/src/mainboard/intel/baskingridge/dsdt.asl index 28d743e..5db05e8 100644 --- a/src/mainboard/intel/baskingridge/dsdt.asl +++ b/src/mainboard/intel/baskingridge/dsdt.asl @@ -51,6 +51,5 @@
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/cannonlake_rvp/dsdt.asl b/src/mainboard/intel/cannonlake_rvp/dsdt.asl index 9a519c0..3444661 100644 --- a/src/mainboard/intel/cannonlake_rvp/dsdt.asl +++ b/src/mainboard/intel/cannonlake_rvp/dsdt.asl @@ -44,7 +44,6 @@ #include <vendorcode/google/chromeos/acpi/chromeos.asl> #endif
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
} diff --git a/src/mainboard/intel/coffeelake_rvp/dsdt.asl b/src/mainboard/intel/coffeelake_rvp/dsdt.asl index 1d7216a..529f89f 100644 --- a/src/mainboard/intel/coffeelake_rvp/dsdt.asl +++ b/src/mainboard/intel/coffeelake_rvp/dsdt.asl @@ -44,7 +44,6 @@ #include <vendorcode/google/chromeos/acpi/chromeos.asl> #endif
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
} diff --git a/src/mainboard/intel/d510mo/dsdt.asl b/src/mainboard/intel/d510mo/dsdt.asl index e07ecc2..a0e9b62 100644 --- a/src/mainboard/intel/d510mo/dsdt.asl +++ b/src/mainboard/intel/d510mo/dsdt.asl @@ -37,6 +37,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/d945gclf/dsdt.asl b/src/mainboard/intel/d945gclf/dsdt.asl index afc5386..3027f58 100644 --- a/src/mainboard/intel/d945gclf/dsdt.asl +++ b/src/mainboard/intel/d945gclf/dsdt.asl @@ -49,6 +49,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/dg41wv/dsdt.asl b/src/mainboard/intel/dg41wv/dsdt.asl index 31e7c10..cddaa3a 100644 --- a/src/mainboard/intel/dg41wv/dsdt.asl +++ b/src/mainboard/intel/dg41wv/dsdt.asl @@ -37,6 +37,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/dg43gt/dsdt.asl b/src/mainboard/intel/dg43gt/dsdt.asl index f36d179..71d175f 100644 --- a/src/mainboard/intel/dg43gt/dsdt.asl +++ b/src/mainboard/intel/dg43gt/dsdt.asl @@ -37,6 +37,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/emeraldlake2/dsdt.asl b/src/mainboard/intel/emeraldlake2/dsdt.asl index 74268ef..2aeabfc 100644 --- a/src/mainboard/intel/emeraldlake2/dsdt.asl +++ b/src/mainboard/intel/emeraldlake2/dsdt.asl @@ -52,6 +52,5 @@
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/glkrvp/dsdt.asl b/src/mainboard/intel/glkrvp/dsdt.asl index d7711be..76b3f32 100644 --- a/src/mainboard/intel/glkrvp/dsdt.asl +++ b/src/mainboard/intel/glkrvp/dsdt.asl @@ -44,7 +44,6 @@ /* Chrome OS specific */ #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Chrome OS Embedded Controller */ diff --git a/src/mainboard/intel/harcuvar/dsdt.asl b/src/mainboard/intel/harcuvar/dsdt.asl index c7e7f7c..37bb6fb 100644 --- a/src/mainboard/intel/harcuvar/dsdt.asl +++ b/src/mainboard/intel/harcuvar/dsdt.asl @@ -50,6 +50,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/icelake_rvp/dsdt.asl b/src/mainboard/intel/icelake_rvp/dsdt.asl index f8fcd4d..ae6193f 100644 --- a/src/mainboard/intel/icelake_rvp/dsdt.asl +++ b/src/mainboard/intel/icelake_rvp/dsdt.asl @@ -59,7 +59,6 @@ } #endif
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific diff --git a/src/mainboard/intel/kblrvp/dsdt.asl b/src/mainboard/intel/kblrvp/dsdt.asl index 059bcd5..854cc9d 100644 --- a/src/mainboard/intel/kblrvp/dsdt.asl +++ b/src/mainboard/intel/kblrvp/dsdt.asl @@ -56,7 +56,6 @@ #include <vendorcode/google/chromeos/acpi/chromeos.asl> #endif
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific diff --git a/src/mainboard/intel/kunimitsu/dsdt.asl b/src/mainboard/intel/kunimitsu/dsdt.asl index 6dab56e..188b119 100644 --- a/src/mainboard/intel/kunimitsu/dsdt.asl +++ b/src/mainboard/intel/kunimitsu/dsdt.asl @@ -48,7 +48,6 @@ // Chrome OS specific #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific diff --git a/src/mainboard/intel/leafhill/dsdt.asl b/src/mainboard/intel/leafhill/dsdt.asl index 6fccf49..94dc024 100644 --- a/src/mainboard/intel/leafhill/dsdt.asl +++ b/src/mainboard/intel/leafhill/dsdt.asl @@ -38,6 +38,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/minnow3/dsdt.asl b/src/mainboard/intel/minnow3/dsdt.asl index 6fccf49..94dc024 100644 --- a/src/mainboard/intel/minnow3/dsdt.asl +++ b/src/mainboard/intel/minnow3/dsdt.asl @@ -38,6 +38,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/saddlebrook/dsdt.asl b/src/mainboard/intel/saddlebrook/dsdt.asl index 86ea299..66b0dda 100644 --- a/src/mainboard/intel/saddlebrook/dsdt.asl +++ b/src/mainboard/intel/saddlebrook/dsdt.asl @@ -42,7 +42,6 @@ } }
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific diff --git a/src/mainboard/intel/strago/dsdt.asl b/src/mainboard/intel/strago/dsdt.asl index e89b887..97a1b73 100644 --- a/src/mainboard/intel/strago/dsdt.asl +++ b/src/mainboard/intel/strago/dsdt.asl @@ -57,7 +57,6 @@ } #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
#include "acpi/mainboard.asl" diff --git a/src/mainboard/intel/wtm2/dsdt.asl b/src/mainboard/intel/wtm2/dsdt.asl index d3febf5..322607a 100644 --- a/src/mainboard/intel/wtm2/dsdt.asl +++ b/src/mainboard/intel/wtm2/dsdt.asl @@ -53,7 +53,6 @@ // Chrome OS specific #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific diff --git a/src/mainboard/kontron/986lcd-m/dsdt.asl b/src/mainboard/kontron/986lcd-m/dsdt.asl index d4ffd7b..c4da9d4 100644 --- a/src/mainboard/kontron/986lcd-m/dsdt.asl +++ b/src/mainboard/kontron/986lcd-m/dsdt.asl @@ -45,6 +45,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/kontron/ktqm77/dsdt.asl b/src/mainboard/kontron/ktqm77/dsdt.asl index 2d6ce79..4eed3cf 100644 --- a/src/mainboard/kontron/ktqm77/dsdt.asl +++ b/src/mainboard/kontron/ktqm77/dsdt.asl @@ -51,6 +51,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/t400/dsdt.asl b/src/mainboard/lenovo/t400/dsdt.asl index eb9c2ad..5f2c24e 100644 --- a/src/mainboard/lenovo/t400/dsdt.asl +++ b/src/mainboard/lenovo/t400/dsdt.asl @@ -52,7 +52,6 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Hybrid graphics support code */ diff --git a/src/mainboard/lenovo/t410/dsdt.asl b/src/mainboard/lenovo/t410/dsdt.asl index 9d0204e..9c1c46a 100644 --- a/src/mainboard/lenovo/t410/dsdt.asl +++ b/src/mainboard/lenovo/t410/dsdt.asl @@ -86,7 +86,6 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Dock support code */ diff --git a/src/mainboard/lenovo/t420/dsdt.asl b/src/mainboard/lenovo/t420/dsdt.asl index a6a57e2..4678951 100644 --- a/src/mainboard/lenovo/t420/dsdt.asl +++ b/src/mainboard/lenovo/t420/dsdt.asl @@ -51,6 +51,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/t420s/dsdt.asl b/src/mainboard/lenovo/t420s/dsdt.asl index a6a57e2..4678951 100644 --- a/src/mainboard/lenovo/t420s/dsdt.asl +++ b/src/mainboard/lenovo/t420s/dsdt.asl @@ -51,6 +51,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/t430s/dsdt.asl b/src/mainboard/lenovo/t430s/dsdt.asl index a6a57e2..4678951 100644 --- a/src/mainboard/lenovo/t430s/dsdt.asl +++ b/src/mainboard/lenovo/t430s/dsdt.asl @@ -51,6 +51,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/t520/dsdt.asl b/src/mainboard/lenovo/t520/dsdt.asl index a6a57e2..4678951 100644 --- a/src/mainboard/lenovo/t520/dsdt.asl +++ b/src/mainboard/lenovo/t520/dsdt.asl @@ -51,6 +51,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/t530/dsdt.asl b/src/mainboard/lenovo/t530/dsdt.asl index a6a57e2..4678951 100644 --- a/src/mainboard/lenovo/t530/dsdt.asl +++ b/src/mainboard/lenovo/t530/dsdt.asl @@ -51,6 +51,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/t60/dsdt.asl b/src/mainboard/lenovo/t60/dsdt.asl index 1292321..bffd926 100644 --- a/src/mainboard/lenovo/t60/dsdt.asl +++ b/src/mainboard/lenovo/t60/dsdt.asl @@ -58,7 +58,6 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
// Dock support code diff --git a/src/mainboard/lenovo/thinkcentre_a58/dsdt.asl b/src/mainboard/lenovo/thinkcentre_a58/dsdt.asl index 31e7c10..cddaa3a 100644 --- a/src/mainboard/lenovo/thinkcentre_a58/dsdt.asl +++ b/src/mainboard/lenovo/thinkcentre_a58/dsdt.asl @@ -37,6 +37,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/x131e/dsdt.asl b/src/mainboard/lenovo/x131e/dsdt.asl index 95eb2db..1ed992d 100644 --- a/src/mainboard/lenovo/x131e/dsdt.asl +++ b/src/mainboard/lenovo/x131e/dsdt.asl @@ -40,7 +40,6 @@ // global NVS and variables #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
Scope (_SB) { diff --git a/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl b/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl index 3acc87d..06e8ea5 100644 --- a/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl +++ b/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl @@ -51,6 +51,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/x200/dsdt.asl b/src/mainboard/lenovo/x200/dsdt.asl index e300234..c15384f 100644 --- a/src/mainboard/lenovo/x200/dsdt.asl +++ b/src/mainboard/lenovo/x200/dsdt.asl @@ -51,7 +51,6 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Dock support code */ diff --git a/src/mainboard/lenovo/x201/dsdt.asl b/src/mainboard/lenovo/x201/dsdt.asl index 9d0204e..9c1c46a 100644 --- a/src/mainboard/lenovo/x201/dsdt.asl +++ b/src/mainboard/lenovo/x201/dsdt.asl @@ -86,7 +86,6 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Dock support code */ diff --git a/src/mainboard/lenovo/x220/dsdt.asl b/src/mainboard/lenovo/x220/dsdt.asl index a6a57e2..4678951 100644 --- a/src/mainboard/lenovo/x220/dsdt.asl +++ b/src/mainboard/lenovo/x220/dsdt.asl @@ -51,6 +51,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/x230/dsdt.asl b/src/mainboard/lenovo/x230/dsdt.asl index a6a57e2..4678951 100644 --- a/src/mainboard/lenovo/x230/dsdt.asl +++ b/src/mainboard/lenovo/x230/dsdt.asl @@ -51,6 +51,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/x60/dsdt.asl b/src/mainboard/lenovo/x60/dsdt.asl index 00430bb..bd9d3dc 100644 --- a/src/mainboard/lenovo/x60/dsdt.asl +++ b/src/mainboard/lenovo/x60/dsdt.asl @@ -52,7 +52,6 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
// Dock support code diff --git a/src/mainboard/packardbell/ms2290/dsdt.asl b/src/mainboard/packardbell/ms2290/dsdt.asl index 72b7d4c..1dc23e3 100644 --- a/src/mainboard/packardbell/ms2290/dsdt.asl +++ b/src/mainboard/packardbell/ms2290/dsdt.asl @@ -80,6 +80,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/portwell/m107/dsdt.asl b/src/mainboard/portwell/m107/dsdt.asl index 518e249..20ef1e8 100644 --- a/src/mainboard/portwell/m107/dsdt.asl +++ b/src/mainboard/portwell/m107/dsdt.asl @@ -44,7 +44,7 @@ } }
- /* Chipset specific sleep states */ + /* Mainboard specific sleep states */ #include "acpi/sleepstates.asl" #include "acpi/mainboard.asl" } diff --git a/src/mainboard/purism/librem_bdw/dsdt.asl b/src/mainboard/purism/librem_bdw/dsdt.asl index 3cd4ef9..c2c1885 100644 --- a/src/mainboard/purism/librem_bdw/dsdt.asl +++ b/src/mainboard/purism/librem_bdw/dsdt.asl @@ -40,7 +40,6 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Mainboard specific */ diff --git a/src/mainboard/purism/librem_skl/dsdt.asl b/src/mainboard/purism/librem_skl/dsdt.asl index 1cd0531..92b72e9 100644 --- a/src/mainboard/purism/librem_skl/dsdt.asl +++ b/src/mainboard/purism/librem_skl/dsdt.asl @@ -43,7 +43,6 @@
}
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific diff --git a/src/mainboard/razer/blade_stealth_kbl/dsdt.asl b/src/mainboard/razer/blade_stealth_kbl/dsdt.asl index 0112654..ef48745 100644 --- a/src/mainboard/razer/blade_stealth_kbl/dsdt.asl +++ b/src/mainboard/razer/blade_stealth_kbl/dsdt.asl @@ -42,7 +42,7 @@ }
} - // Chipset specific sleep states + #include <southbridge/intel/common/acpi/sleepstates.asl>
#include "acpi/mainboard.asl" diff --git a/src/mainboard/roda/rk886ex/dsdt.asl b/src/mainboard/roda/rk886ex/dsdt.asl index f9a2abe..fd806e9 100644 --- a/src/mainboard/roda/rk886ex/dsdt.asl +++ b/src/mainboard/roda/rk886ex/dsdt.asl @@ -50,6 +50,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/roda/rk9/dsdt.asl b/src/mainboard/roda/rk9/dsdt.asl index e8fb13d..76a51ce 100644 --- a/src/mainboard/roda/rk9/dsdt.asl +++ b/src/mainboard/roda/rk9/dsdt.asl @@ -52,6 +52,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/roda/rv11/dsdt.asl b/src/mainboard/roda/rv11/dsdt.asl index 67f88d0..65db3a5 100644 --- a/src/mainboard/roda/rv11/dsdt.asl +++ b/src/mainboard/roda/rv11/dsdt.asl @@ -49,6 +49,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/samsung/lumpy/dsdt.asl b/src/mainboard/samsung/lumpy/dsdt.asl index 7dd85b5..94f0671 100644 --- a/src/mainboard/samsung/lumpy/dsdt.asl +++ b/src/mainboard/samsung/lumpy/dsdt.asl @@ -55,6 +55,5 @@
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/samsung/stumpy/dsdt.asl b/src/mainboard/samsung/stumpy/dsdt.asl index db8bfd4..77533d3 100644 --- a/src/mainboard/samsung/stumpy/dsdt.asl +++ b/src/mainboard/samsung/stumpy/dsdt.asl @@ -52,6 +52,5 @@
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/scaleway/tagada/dsdt.asl b/src/mainboard/scaleway/tagada/dsdt.asl index c7e7f7c..37bb6fb 100644 --- a/src/mainboard/scaleway/tagada/dsdt.asl +++ b/src/mainboard/scaleway/tagada/dsdt.asl @@ -50,6 +50,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/siemens/mc_apl1/dsdt.asl b/src/mainboard/siemens/mc_apl1/dsdt.asl index 449bcf8..656281e 100644 --- a/src/mainboard/siemens/mc_apl1/dsdt.asl +++ b/src/mainboard/siemens/mc_apl1/dsdt.asl @@ -41,6 +41,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/supermicro/x11-lga1151-series/dsdt.asl b/src/mainboard/supermicro/x11-lga1151-series/dsdt.asl index 86ea299..66b0dda 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/dsdt.asl +++ b/src/mainboard/supermicro/x11-lga1151-series/dsdt.asl @@ -42,7 +42,6 @@ } }
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific diff --git a/src/mainboard/up/squared/dsdt.asl b/src/mainboard/up/squared/dsdt.asl index 6fccf49..94dc024 100644 --- a/src/mainboard/up/squared/dsdt.asl +++ b/src/mainboard/up/squared/dsdt.asl @@ -38,6 +38,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> }
Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37855 )
Change subject: mb/**/dsdt.asl: Remove outdated sleepstates.asl comment ......................................................................
Patch Set 1: Code-Review+1
Wim Vervoorn has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37855 )
Change subject: mb/**/dsdt.asl: Remove outdated sleepstates.asl comment ......................................................................
Patch Set 1: Code-Review+1
Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37855 )
Change subject: mb/**/dsdt.asl: Remove outdated sleepstates.asl comment ......................................................................
Patch Set 1:
I read this comment as: "We are now including a chipset specific file from mainboard context." How was it changed so that this comment is not true anymore? The include still targets a file in the chipset (southbridge or soc) domain. I just must oversee something.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37855 )
Change subject: mb/**/dsdt.asl: Remove outdated sleepstates.asl comment ......................................................................
Patch Set 1: Code-Review+1
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37855 )
Change subject: mb/**/dsdt.asl: Remove outdated sleepstates.asl comment ......................................................................
Patch Set 1:
Patch Set 1:
I read this comment as: "We are now including a chipset specific file from mainboard context." How was it changed so that this comment is not true anymore? The include still targets a file in the chipset (southbridge or soc) domain. I just must oversee something.
I understand this comment as "include chipset-specific sleep states". To me, this sounds as if sleep state definitions vary from chipset to chipset, which is no longer the case (they are common to all intel southbridges). Also, half of the comment just repeats the filename, which is somewhat redundant.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37855 )
Change subject: mb/**/dsdt.asl: Remove outdated sleepstates.asl comment ......................................................................
Patch Set 1:
Patch Set 1:
Patch Set 1:
I read this comment as: "We are now including a chipset specific file from mainboard context." How was it changed so that this comment is not true anymore? The include still targets a file in the chipset (southbridge or soc) domain. I just must oversee something.
I understand this comment as "include chipset-specific sleep states". To me, this sounds as if sleep state definitions vary from chipset to chipset, which is no longer the case (they are common to all intel southbridges). Also, half of the comment just repeats the filename, which is somewhat redundant.
Also, note that there are two exceptions: facebook/fbg1701 and portwell/m107. These boards have their own definition of sleepstates, so the comment is updated instead.
Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37855 )
Change subject: mb/**/dsdt.asl: Remove outdated sleepstates.asl comment ......................................................................
Patch Set 1: Code-Review+2
Fine with me.
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/37855 )
Change subject: mb/**/dsdt.asl: Remove outdated sleepstates.asl comment ......................................................................
mb/**/dsdt.asl: Remove outdated sleepstates.asl comment
Previously, each Intel chipset had its own sleepstates.asl file. However, this is no longer the case, so drop these comments.
Change-Id: I50aba6e74f41e2fa498375b5eb6b7e993d06bcac Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/37855 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Frans Hendriks fhendriks@eltan.com Reviewed-by: Wim Vervoorn wvervoorn@eltan.com Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Reviewed-by: Werner Zeh werner.zeh@siemens.com --- M src/mainboard/apple/macbook21/dsdt.asl M src/mainboard/asrock/g41c-gs/dsdt.asl M src/mainboard/asrock/h110m/dsdt.asl M src/mainboard/asus/p5gc-mx/dsdt.asl M src/mainboard/asus/p5qc/dsdt.asl M src/mainboard/asus/p5ql-em/dsdt.asl M src/mainboard/asus/p5qpl-am/dsdt.asl M src/mainboard/facebook/fbg1701/dsdt.asl M src/mainboard/facebook/monolith/dsdt.asl M src/mainboard/foxconn/d41s/dsdt.asl M src/mainboard/foxconn/g41s-k/dsdt.asl M src/mainboard/getac/p470/dsdt.asl M src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl M src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl M src/mainboard/google/auron/dsdt.asl M src/mainboard/google/beltino/dsdt.asl M src/mainboard/google/butterfly/dsdt.asl M src/mainboard/google/cyan/dsdt.asl M src/mainboard/google/dragonegg/dsdt.asl M src/mainboard/google/drallion/dsdt.asl M src/mainboard/google/eve/dsdt.asl M src/mainboard/google/fizz/dsdt.asl M src/mainboard/google/glados/dsdt.asl M src/mainboard/google/hatch/dsdt.asl M src/mainboard/google/jecht/dsdt.asl M src/mainboard/google/link/dsdt.asl M src/mainboard/google/octopus/dsdt.asl M src/mainboard/google/parrot/dsdt.asl M src/mainboard/google/poppy/dsdt.asl M src/mainboard/google/rambi/dsdt.asl M src/mainboard/google/reef/dsdt.asl M src/mainboard/google/sarien/dsdt.asl M src/mainboard/google/slippy/dsdt.asl M src/mainboard/google/stout/dsdt.asl M src/mainboard/ibase/mb899/dsdt.asl M src/mainboard/intel/apollolake_rvp/dsdt.asl M src/mainboard/intel/baskingridge/dsdt.asl M src/mainboard/intel/cannonlake_rvp/dsdt.asl M src/mainboard/intel/coffeelake_rvp/dsdt.asl M src/mainboard/intel/d510mo/dsdt.asl M src/mainboard/intel/d945gclf/dsdt.asl M src/mainboard/intel/dg41wv/dsdt.asl M src/mainboard/intel/dg43gt/dsdt.asl M src/mainboard/intel/emeraldlake2/dsdt.asl M src/mainboard/intel/glkrvp/dsdt.asl M src/mainboard/intel/harcuvar/dsdt.asl M src/mainboard/intel/icelake_rvp/dsdt.asl M src/mainboard/intel/kblrvp/dsdt.asl M src/mainboard/intel/kunimitsu/dsdt.asl M src/mainboard/intel/leafhill/dsdt.asl M src/mainboard/intel/minnow3/dsdt.asl M src/mainboard/intel/saddlebrook/dsdt.asl M src/mainboard/intel/strago/dsdt.asl M src/mainboard/intel/wtm2/dsdt.asl M src/mainboard/kontron/986lcd-m/dsdt.asl M src/mainboard/kontron/ktqm77/dsdt.asl M src/mainboard/lenovo/t400/dsdt.asl M src/mainboard/lenovo/t410/dsdt.asl M src/mainboard/lenovo/t420/dsdt.asl M src/mainboard/lenovo/t420s/dsdt.asl M src/mainboard/lenovo/t430s/dsdt.asl M src/mainboard/lenovo/t520/dsdt.asl M src/mainboard/lenovo/t530/dsdt.asl M src/mainboard/lenovo/t60/dsdt.asl M src/mainboard/lenovo/thinkcentre_a58/dsdt.asl M src/mainboard/lenovo/x131e/dsdt.asl M src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl M src/mainboard/lenovo/x200/dsdt.asl M src/mainboard/lenovo/x201/dsdt.asl M src/mainboard/lenovo/x220/dsdt.asl M src/mainboard/lenovo/x230/dsdt.asl M src/mainboard/lenovo/x60/dsdt.asl M src/mainboard/packardbell/ms2290/dsdt.asl M src/mainboard/portwell/m107/dsdt.asl M src/mainboard/purism/librem_bdw/dsdt.asl M src/mainboard/purism/librem_skl/dsdt.asl M src/mainboard/razer/blade_stealth_kbl/dsdt.asl M src/mainboard/roda/rk886ex/dsdt.asl M src/mainboard/roda/rk9/dsdt.asl M src/mainboard/roda/rv11/dsdt.asl M src/mainboard/samsung/lumpy/dsdt.asl M src/mainboard/samsung/stumpy/dsdt.asl M src/mainboard/scaleway/tagada/dsdt.asl M src/mainboard/siemens/mc_apl1/dsdt.asl M src/mainboard/supermicro/x11-lga1151-series/dsdt.asl M src/mainboard/up/squared/dsdt.asl 86 files changed, 3 insertions(+), 86 deletions(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Werner Zeh: Looks good to me, approved Wim Vervoorn: Looks good to me, but someone else must approve Frans Hendriks: Looks good to me, but someone else must approve
diff --git a/src/mainboard/apple/macbook21/dsdt.asl b/src/mainboard/apple/macbook21/dsdt.asl index 7968c6e..97a4b05 100644 --- a/src/mainboard/apple/macbook21/dsdt.asl +++ b/src/mainboard/apple/macbook21/dsdt.asl @@ -44,6 +44,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/asrock/g41c-gs/dsdt.asl b/src/mainboard/asrock/g41c-gs/dsdt.asl index 31e7c10..cddaa3a 100644 --- a/src/mainboard/asrock/g41c-gs/dsdt.asl +++ b/src/mainboard/asrock/g41c-gs/dsdt.asl @@ -37,6 +37,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/asrock/h110m/dsdt.asl b/src/mainboard/asrock/h110m/dsdt.asl index 0b3baf6..1f3537e 100644 --- a/src/mainboard/asrock/h110m/dsdt.asl +++ b/src/mainboard/asrock/h110m/dsdt.asl @@ -47,7 +47,6 @@ #include "acpi/dptf.asl" }
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific diff --git a/src/mainboard/asus/p5gc-mx/dsdt.asl b/src/mainboard/asus/p5gc-mx/dsdt.asl index 1c360f9..0e4bc65 100644 --- a/src/mainboard/asus/p5gc-mx/dsdt.asl +++ b/src/mainboard/asus/p5gc-mx/dsdt.asl @@ -48,6 +48,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/asus/p5qc/dsdt.asl b/src/mainboard/asus/p5qc/dsdt.asl index b9b5adc..75e3b98 100644 --- a/src/mainboard/asus/p5qc/dsdt.asl +++ b/src/mainboard/asus/p5qc/dsdt.asl @@ -37,6 +37,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/asus/p5ql-em/dsdt.asl b/src/mainboard/asus/p5ql-em/dsdt.asl index 632c6cb..07f19ec 100644 --- a/src/mainboard/asus/p5ql-em/dsdt.asl +++ b/src/mainboard/asus/p5ql-em/dsdt.asl @@ -36,6 +36,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/asus/p5qpl-am/dsdt.asl b/src/mainboard/asus/p5qpl-am/dsdt.asl index 31e7c10..cddaa3a 100644 --- a/src/mainboard/asus/p5qpl-am/dsdt.asl +++ b/src/mainboard/asus/p5qpl-am/dsdt.asl @@ -37,6 +37,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/facebook/fbg1701/dsdt.asl b/src/mainboard/facebook/fbg1701/dsdt.asl index 9b4dc81..6fcb39a 100644 --- a/src/mainboard/facebook/fbg1701/dsdt.asl +++ b/src/mainboard/facebook/fbg1701/dsdt.asl @@ -43,7 +43,7 @@ } }
- /* Chipset specific sleep states */ + /* Mainboard specific sleep states */ #include "acpi/sleepstates.asl" #include "acpi/mainboard.asl" } diff --git a/src/mainboard/facebook/monolith/dsdt.asl b/src/mainboard/facebook/monolith/dsdt.asl index 8fea1d5..004cc62 100644 --- a/src/mainboard/facebook/monolith/dsdt.asl +++ b/src/mainboard/facebook/monolith/dsdt.asl @@ -45,7 +45,6 @@ #include "acpi/dptf.asl" }
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific diff --git a/src/mainboard/foxconn/d41s/dsdt.asl b/src/mainboard/foxconn/d41s/dsdt.asl index e07ecc2..a0e9b62 100644 --- a/src/mainboard/foxconn/d41s/dsdt.asl +++ b/src/mainboard/foxconn/d41s/dsdt.asl @@ -37,6 +37,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/foxconn/g41s-k/dsdt.asl b/src/mainboard/foxconn/g41s-k/dsdt.asl index 31e7c10..cddaa3a 100644 --- a/src/mainboard/foxconn/g41s-k/dsdt.asl +++ b/src/mainboard/foxconn/g41s-k/dsdt.asl @@ -37,6 +37,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/getac/p470/dsdt.asl b/src/mainboard/getac/p470/dsdt.asl index 9be21ad..ce36c28 100644 --- a/src/mainboard/getac/p470/dsdt.asl +++ b/src/mainboard/getac/p470/dsdt.asl @@ -53,6 +53,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl b/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl index 7d0ffe0..be640c5 100644 --- a/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl +++ b/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl @@ -48,6 +48,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl b/src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl index 31e7c10..cddaa3a 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl +++ b/src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl @@ -37,6 +37,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/google/auron/dsdt.asl b/src/mainboard/google/auron/dsdt.asl index b463214..1936a3e 100644 --- a/src/mainboard/google/auron/dsdt.asl +++ b/src/mainboard/google/auron/dsdt.asl @@ -49,7 +49,6 @@ // Chrome OS specific #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific diff --git a/src/mainboard/google/beltino/dsdt.asl b/src/mainboard/google/beltino/dsdt.asl index 447ea02..7998125 100644 --- a/src/mainboard/google/beltino/dsdt.asl +++ b/src/mainboard/google/beltino/dsdt.asl @@ -51,6 +51,5 @@ // Chrome OS specific #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/google/butterfly/dsdt.asl b/src/mainboard/google/butterfly/dsdt.asl index ad9b77b..b7a8cdf 100644 --- a/src/mainboard/google/butterfly/dsdt.asl +++ b/src/mainboard/google/butterfly/dsdt.asl @@ -52,6 +52,5 @@
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/google/cyan/dsdt.asl b/src/mainboard/google/cyan/dsdt.asl index 53a92e0..45aeeb4 100644 --- a/src/mainboard/google/cyan/dsdt.asl +++ b/src/mainboard/google/cyan/dsdt.asl @@ -60,7 +60,6 @@ } #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
#include "acpi/mainboard.asl" diff --git a/src/mainboard/google/dragonegg/dsdt.asl b/src/mainboard/google/dragonegg/dsdt.asl index cb2ce64..24814da 100644 --- a/src/mainboard/google/dragonegg/dsdt.asl +++ b/src/mainboard/google/dragonegg/dsdt.asl @@ -47,7 +47,6 @@ #include <vendorcode/google/chromeos/acpi/chromeos.asl> #endif
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Chrome OS Embedded Controller */ diff --git a/src/mainboard/google/drallion/dsdt.asl b/src/mainboard/google/drallion/dsdt.asl index 92470a9..78c6c16 100644 --- a/src/mainboard/google/drallion/dsdt.asl +++ b/src/mainboard/google/drallion/dsdt.asl @@ -52,7 +52,6 @@ #include <vendorcode/google/chromeos/acpi/amac.asl> #endif
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Low power idle table */ diff --git a/src/mainboard/google/eve/dsdt.asl b/src/mainboard/google/eve/dsdt.asl index 90463c8..5615e43 100644 --- a/src/mainboard/google/eve/dsdt.asl +++ b/src/mainboard/google/eve/dsdt.asl @@ -46,7 +46,6 @@ /* Chrome OS specific */ #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Chrome OS Embedded Controller */ diff --git a/src/mainboard/google/fizz/dsdt.asl b/src/mainboard/google/fizz/dsdt.asl index 613fe31..b847df6 100644 --- a/src/mainboard/google/fizz/dsdt.asl +++ b/src/mainboard/google/fizz/dsdt.asl @@ -46,7 +46,6 @@ /* Chrome OS specific */ #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Chrome OS Embedded Controller */ diff --git a/src/mainboard/google/glados/dsdt.asl b/src/mainboard/google/glados/dsdt.asl index 06209e4..fbb2371 100644 --- a/src/mainboard/google/glados/dsdt.asl +++ b/src/mainboard/google/glados/dsdt.asl @@ -47,7 +47,6 @@ // Chrome OS specific #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific diff --git a/src/mainboard/google/hatch/dsdt.asl b/src/mainboard/google/hatch/dsdt.asl index 8807191..1a0ff68 100644 --- a/src/mainboard/google/hatch/dsdt.asl +++ b/src/mainboard/google/hatch/dsdt.asl @@ -47,7 +47,6 @@ #include <vendorcode/google/chromeos/acpi/chromeos.asl> #endif
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Low power idle table */ diff --git a/src/mainboard/google/jecht/dsdt.asl b/src/mainboard/google/jecht/dsdt.asl index 1cd2bd3..66e66eb 100644 --- a/src/mainboard/google/jecht/dsdt.asl +++ b/src/mainboard/google/jecht/dsdt.asl @@ -50,7 +50,6 @@ // Chrome OS specific #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific diff --git a/src/mainboard/google/link/dsdt.asl b/src/mainboard/google/link/dsdt.asl index b396319..a7e60f3 100644 --- a/src/mainboard/google/link/dsdt.asl +++ b/src/mainboard/google/link/dsdt.asl @@ -53,6 +53,5 @@
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/google/octopus/dsdt.asl b/src/mainboard/google/octopus/dsdt.asl index 2b6c33f..b193909 100644 --- a/src/mainboard/google/octopus/dsdt.asl +++ b/src/mainboard/google/octopus/dsdt.asl @@ -44,7 +44,6 @@ /* Chrome OS specific */ #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Chrome OS Embedded Controller */ diff --git a/src/mainboard/google/parrot/dsdt.asl b/src/mainboard/google/parrot/dsdt.asl index a762326..f03d010 100644 --- a/src/mainboard/google/parrot/dsdt.asl +++ b/src/mainboard/google/parrot/dsdt.asl @@ -53,6 +53,5 @@
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/google/poppy/dsdt.asl b/src/mainboard/google/poppy/dsdt.asl index ce2f8fc..bf8d221 100644 --- a/src/mainboard/google/poppy/dsdt.asl +++ b/src/mainboard/google/poppy/dsdt.asl @@ -53,7 +53,6 @@ /* Chrome OS specific */ #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Chrome OS Embedded Controller */ diff --git a/src/mainboard/google/rambi/dsdt.asl b/src/mainboard/google/rambi/dsdt.asl index ed57e43..8adde36 100644 --- a/src/mainboard/google/rambi/dsdt.asl +++ b/src/mainboard/google/rambi/dsdt.asl @@ -46,7 +46,6 @@
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
#include "acpi/mainboard.asl" diff --git a/src/mainboard/google/reef/dsdt.asl b/src/mainboard/google/reef/dsdt.asl index 29b8165..6de58d8 100644 --- a/src/mainboard/google/reef/dsdt.asl +++ b/src/mainboard/google/reef/dsdt.asl @@ -44,7 +44,6 @@ /* Chrome OS specific */ #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Chrome OS Embedded Controller */ diff --git a/src/mainboard/google/sarien/dsdt.asl b/src/mainboard/google/sarien/dsdt.asl index 99a8627..a809b75 100644 --- a/src/mainboard/google/sarien/dsdt.asl +++ b/src/mainboard/google/sarien/dsdt.asl @@ -52,7 +52,6 @@ #include <vendorcode/google/chromeos/acpi/amac.asl> #endif
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Low power idle table */ diff --git a/src/mainboard/google/slippy/dsdt.asl b/src/mainboard/google/slippy/dsdt.asl index 9881a5f..0104679 100644 --- a/src/mainboard/google/slippy/dsdt.asl +++ b/src/mainboard/google/slippy/dsdt.asl @@ -62,6 +62,5 @@ // Chrome OS specific #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/google/stout/dsdt.asl b/src/mainboard/google/stout/dsdt.asl index a62fed2..b89766e 100644 --- a/src/mainboard/google/stout/dsdt.asl +++ b/src/mainboard/google/stout/dsdt.asl @@ -53,6 +53,5 @@
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/ibase/mb899/dsdt.asl b/src/mainboard/ibase/mb899/dsdt.asl index 45cc48f..7d54579 100644 --- a/src/mainboard/ibase/mb899/dsdt.asl +++ b/src/mainboard/ibase/mb899/dsdt.asl @@ -45,6 +45,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/apollolake_rvp/dsdt.asl b/src/mainboard/intel/apollolake_rvp/dsdt.asl index 9dd8879..ba17f28 100644 --- a/src/mainboard/intel/apollolake_rvp/dsdt.asl +++ b/src/mainboard/intel/apollolake_rvp/dsdt.asl @@ -32,7 +32,6 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
} diff --git a/src/mainboard/intel/baskingridge/dsdt.asl b/src/mainboard/intel/baskingridge/dsdt.asl index 066160d..34b14e2 100644 --- a/src/mainboard/intel/baskingridge/dsdt.asl +++ b/src/mainboard/intel/baskingridge/dsdt.asl @@ -50,6 +50,5 @@
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/cannonlake_rvp/dsdt.asl b/src/mainboard/intel/cannonlake_rvp/dsdt.asl index 4fe13d4..26f1565 100644 --- a/src/mainboard/intel/cannonlake_rvp/dsdt.asl +++ b/src/mainboard/intel/cannonlake_rvp/dsdt.asl @@ -43,7 +43,6 @@ #include <vendorcode/google/chromeos/acpi/chromeos.asl> #endif
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
} diff --git a/src/mainboard/intel/coffeelake_rvp/dsdt.asl b/src/mainboard/intel/coffeelake_rvp/dsdt.asl index 10418c3..58a10d9 100644 --- a/src/mainboard/intel/coffeelake_rvp/dsdt.asl +++ b/src/mainboard/intel/coffeelake_rvp/dsdt.asl @@ -43,7 +43,6 @@ #include <vendorcode/google/chromeos/acpi/chromeos.asl> #endif
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
} diff --git a/src/mainboard/intel/d510mo/dsdt.asl b/src/mainboard/intel/d510mo/dsdt.asl index e07ecc2..a0e9b62 100644 --- a/src/mainboard/intel/d510mo/dsdt.asl +++ b/src/mainboard/intel/d510mo/dsdt.asl @@ -37,6 +37,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/d945gclf/dsdt.asl b/src/mainboard/intel/d945gclf/dsdt.asl index 7d0ffe0..be640c5 100644 --- a/src/mainboard/intel/d945gclf/dsdt.asl +++ b/src/mainboard/intel/d945gclf/dsdt.asl @@ -48,6 +48,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/dg41wv/dsdt.asl b/src/mainboard/intel/dg41wv/dsdt.asl index 31e7c10..cddaa3a 100644 --- a/src/mainboard/intel/dg41wv/dsdt.asl +++ b/src/mainboard/intel/dg41wv/dsdt.asl @@ -37,6 +37,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/dg43gt/dsdt.asl b/src/mainboard/intel/dg43gt/dsdt.asl index f36d179..71d175f 100644 --- a/src/mainboard/intel/dg43gt/dsdt.asl +++ b/src/mainboard/intel/dg43gt/dsdt.asl @@ -37,6 +37,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/emeraldlake2/dsdt.asl b/src/mainboard/intel/emeraldlake2/dsdt.asl index a27f212..baf75b0 100644 --- a/src/mainboard/intel/emeraldlake2/dsdt.asl +++ b/src/mainboard/intel/emeraldlake2/dsdt.asl @@ -51,6 +51,5 @@
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/glkrvp/dsdt.asl b/src/mainboard/intel/glkrvp/dsdt.asl index d7711be..76b3f32 100644 --- a/src/mainboard/intel/glkrvp/dsdt.asl +++ b/src/mainboard/intel/glkrvp/dsdt.asl @@ -44,7 +44,6 @@ /* Chrome OS specific */ #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Chrome OS Embedded Controller */ diff --git a/src/mainboard/intel/harcuvar/dsdt.asl b/src/mainboard/intel/harcuvar/dsdt.asl index bd32687..f970df9 100644 --- a/src/mainboard/intel/harcuvar/dsdt.asl +++ b/src/mainboard/intel/harcuvar/dsdt.asl @@ -49,6 +49,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/icelake_rvp/dsdt.asl b/src/mainboard/intel/icelake_rvp/dsdt.asl index 3fd6fca..2eab610 100644 --- a/src/mainboard/intel/icelake_rvp/dsdt.asl +++ b/src/mainboard/intel/icelake_rvp/dsdt.asl @@ -58,7 +58,6 @@ } #endif
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific diff --git a/src/mainboard/intel/kblrvp/dsdt.asl b/src/mainboard/intel/kblrvp/dsdt.asl index 84872cb..e34b6c7 100644 --- a/src/mainboard/intel/kblrvp/dsdt.asl +++ b/src/mainboard/intel/kblrvp/dsdt.asl @@ -55,7 +55,6 @@ #include <vendorcode/google/chromeos/acpi/chromeos.asl> #endif
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific diff --git a/src/mainboard/intel/kunimitsu/dsdt.asl b/src/mainboard/intel/kunimitsu/dsdt.asl index 06209e4..fbb2371 100644 --- a/src/mainboard/intel/kunimitsu/dsdt.asl +++ b/src/mainboard/intel/kunimitsu/dsdt.asl @@ -47,7 +47,6 @@ // Chrome OS specific #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific diff --git a/src/mainboard/intel/leafhill/dsdt.asl b/src/mainboard/intel/leafhill/dsdt.asl index 6fccf49..94dc024 100644 --- a/src/mainboard/intel/leafhill/dsdt.asl +++ b/src/mainboard/intel/leafhill/dsdt.asl @@ -38,6 +38,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/minnow3/dsdt.asl b/src/mainboard/intel/minnow3/dsdt.asl index 6fccf49..94dc024 100644 --- a/src/mainboard/intel/minnow3/dsdt.asl +++ b/src/mainboard/intel/minnow3/dsdt.asl @@ -38,6 +38,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/intel/saddlebrook/dsdt.asl b/src/mainboard/intel/saddlebrook/dsdt.asl index b88b1d2..8d6dc2e 100644 --- a/src/mainboard/intel/saddlebrook/dsdt.asl +++ b/src/mainboard/intel/saddlebrook/dsdt.asl @@ -41,7 +41,6 @@ } }
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific diff --git a/src/mainboard/intel/strago/dsdt.asl b/src/mainboard/intel/strago/dsdt.asl index 7bbe1e4..0028fd7 100644 --- a/src/mainboard/intel/strago/dsdt.asl +++ b/src/mainboard/intel/strago/dsdt.asl @@ -56,7 +56,6 @@ } #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
#include "acpi/mainboard.asl" diff --git a/src/mainboard/intel/wtm2/dsdt.asl b/src/mainboard/intel/wtm2/dsdt.asl index 7245983..6bfc172 100644 --- a/src/mainboard/intel/wtm2/dsdt.asl +++ b/src/mainboard/intel/wtm2/dsdt.asl @@ -53,7 +53,6 @@ // Chrome OS specific #include <vendorcode/google/chromeos/acpi/chromeos.asl>
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific diff --git a/src/mainboard/kontron/986lcd-m/dsdt.asl b/src/mainboard/kontron/986lcd-m/dsdt.asl index a6ae284..10f4208 100644 --- a/src/mainboard/kontron/986lcd-m/dsdt.asl +++ b/src/mainboard/kontron/986lcd-m/dsdt.asl @@ -44,6 +44,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/kontron/ktqm77/dsdt.asl b/src/mainboard/kontron/ktqm77/dsdt.asl index da533b7..b297a12 100644 --- a/src/mainboard/kontron/ktqm77/dsdt.asl +++ b/src/mainboard/kontron/ktqm77/dsdt.asl @@ -50,6 +50,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/t400/dsdt.asl b/src/mainboard/lenovo/t400/dsdt.asl index c3c7dda..edf69ab 100644 --- a/src/mainboard/lenovo/t400/dsdt.asl +++ b/src/mainboard/lenovo/t400/dsdt.asl @@ -51,7 +51,6 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Hybrid graphics support code */ diff --git a/src/mainboard/lenovo/t410/dsdt.asl b/src/mainboard/lenovo/t410/dsdt.asl index bf00489..4f67bd8 100644 --- a/src/mainboard/lenovo/t410/dsdt.asl +++ b/src/mainboard/lenovo/t410/dsdt.asl @@ -85,7 +85,6 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Dock support code */ diff --git a/src/mainboard/lenovo/t420/dsdt.asl b/src/mainboard/lenovo/t420/dsdt.asl index b841817..43cb236 100644 --- a/src/mainboard/lenovo/t420/dsdt.asl +++ b/src/mainboard/lenovo/t420/dsdt.asl @@ -50,6 +50,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/t420s/dsdt.asl b/src/mainboard/lenovo/t420s/dsdt.asl index b841817..43cb236 100644 --- a/src/mainboard/lenovo/t420s/dsdt.asl +++ b/src/mainboard/lenovo/t420s/dsdt.asl @@ -50,6 +50,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/t430s/dsdt.asl b/src/mainboard/lenovo/t430s/dsdt.asl index b841817..43cb236 100644 --- a/src/mainboard/lenovo/t430s/dsdt.asl +++ b/src/mainboard/lenovo/t430s/dsdt.asl @@ -50,6 +50,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/t520/dsdt.asl b/src/mainboard/lenovo/t520/dsdt.asl index b841817..43cb236 100644 --- a/src/mainboard/lenovo/t520/dsdt.asl +++ b/src/mainboard/lenovo/t520/dsdt.asl @@ -50,6 +50,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/t530/dsdt.asl b/src/mainboard/lenovo/t530/dsdt.asl index b841817..43cb236 100644 --- a/src/mainboard/lenovo/t530/dsdt.asl +++ b/src/mainboard/lenovo/t530/dsdt.asl @@ -50,6 +50,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/t60/dsdt.asl b/src/mainboard/lenovo/t60/dsdt.asl index 1374216..749f852 100644 --- a/src/mainboard/lenovo/t60/dsdt.asl +++ b/src/mainboard/lenovo/t60/dsdt.asl @@ -57,7 +57,6 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
// Dock support code diff --git a/src/mainboard/lenovo/thinkcentre_a58/dsdt.asl b/src/mainboard/lenovo/thinkcentre_a58/dsdt.asl index 31e7c10..cddaa3a 100644 --- a/src/mainboard/lenovo/thinkcentre_a58/dsdt.asl +++ b/src/mainboard/lenovo/thinkcentre_a58/dsdt.asl @@ -37,6 +37,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/x131e/dsdt.asl b/src/mainboard/lenovo/x131e/dsdt.asl index 842afff..ff80f15 100644 --- a/src/mainboard/lenovo/x131e/dsdt.asl +++ b/src/mainboard/lenovo/x131e/dsdt.asl @@ -39,7 +39,6 @@ // global NVS and variables #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
Scope (_SB) { diff --git a/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl b/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl index 96f7e35..de6866d 100644 --- a/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl +++ b/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl @@ -50,6 +50,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/x200/dsdt.asl b/src/mainboard/lenovo/x200/dsdt.asl index 9052a8f..1290ece 100644 --- a/src/mainboard/lenovo/x200/dsdt.asl +++ b/src/mainboard/lenovo/x200/dsdt.asl @@ -50,7 +50,6 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Dock support code */ diff --git a/src/mainboard/lenovo/x201/dsdt.asl b/src/mainboard/lenovo/x201/dsdt.asl index bf00489..4f67bd8 100644 --- a/src/mainboard/lenovo/x201/dsdt.asl +++ b/src/mainboard/lenovo/x201/dsdt.asl @@ -85,7 +85,6 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Dock support code */ diff --git a/src/mainboard/lenovo/x220/dsdt.asl b/src/mainboard/lenovo/x220/dsdt.asl index b841817..43cb236 100644 --- a/src/mainboard/lenovo/x220/dsdt.asl +++ b/src/mainboard/lenovo/x220/dsdt.asl @@ -50,6 +50,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/x230/dsdt.asl b/src/mainboard/lenovo/x230/dsdt.asl index b841817..43cb236 100644 --- a/src/mainboard/lenovo/x230/dsdt.asl +++ b/src/mainboard/lenovo/x230/dsdt.asl @@ -50,6 +50,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/lenovo/x60/dsdt.asl b/src/mainboard/lenovo/x60/dsdt.asl index 6f01f60..32465d3 100644 --- a/src/mainboard/lenovo/x60/dsdt.asl +++ b/src/mainboard/lenovo/x60/dsdt.asl @@ -51,7 +51,6 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
// Dock support code diff --git a/src/mainboard/packardbell/ms2290/dsdt.asl b/src/mainboard/packardbell/ms2290/dsdt.asl index cbfd3a7..bbd2b29 100644 --- a/src/mainboard/packardbell/ms2290/dsdt.asl +++ b/src/mainboard/packardbell/ms2290/dsdt.asl @@ -79,6 +79,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/portwell/m107/dsdt.asl b/src/mainboard/portwell/m107/dsdt.asl index 9b4dc81..6fcb39a 100644 --- a/src/mainboard/portwell/m107/dsdt.asl +++ b/src/mainboard/portwell/m107/dsdt.asl @@ -43,7 +43,7 @@ } }
- /* Chipset specific sleep states */ + /* Mainboard specific sleep states */ #include "acpi/sleepstates.asl" #include "acpi/mainboard.asl" } diff --git a/src/mainboard/purism/librem_bdw/dsdt.asl b/src/mainboard/purism/librem_bdw/dsdt.asl index 3a53a4d..0e5d7a1 100644 --- a/src/mainboard/purism/librem_bdw/dsdt.asl +++ b/src/mainboard/purism/librem_bdw/dsdt.asl @@ -39,7 +39,6 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl>
/* Mainboard specific */ diff --git a/src/mainboard/purism/librem_skl/dsdt.asl b/src/mainboard/purism/librem_skl/dsdt.asl index b058204..0f78d5f 100644 --- a/src/mainboard/purism/librem_skl/dsdt.asl +++ b/src/mainboard/purism/librem_skl/dsdt.asl @@ -42,7 +42,6 @@
}
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific diff --git a/src/mainboard/razer/blade_stealth_kbl/dsdt.asl b/src/mainboard/razer/blade_stealth_kbl/dsdt.asl index 0112654..ef48745 100644 --- a/src/mainboard/razer/blade_stealth_kbl/dsdt.asl +++ b/src/mainboard/razer/blade_stealth_kbl/dsdt.asl @@ -42,7 +42,7 @@ }
} - // Chipset specific sleep states + #include <southbridge/intel/common/acpi/sleepstates.asl>
#include "acpi/mainboard.asl" diff --git a/src/mainboard/roda/rk886ex/dsdt.asl b/src/mainboard/roda/rk886ex/dsdt.asl index 7011b44..a27ba35 100644 --- a/src/mainboard/roda/rk886ex/dsdt.asl +++ b/src/mainboard/roda/rk886ex/dsdt.asl @@ -49,6 +49,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/roda/rk9/dsdt.asl b/src/mainboard/roda/rk9/dsdt.asl index 0206926..c9bd5c7 100644 --- a/src/mainboard/roda/rk9/dsdt.asl +++ b/src/mainboard/roda/rk9/dsdt.asl @@ -51,6 +51,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/roda/rv11/dsdt.asl b/src/mainboard/roda/rv11/dsdt.asl index 1784b54..fb3b227 100644 --- a/src/mainboard/roda/rv11/dsdt.asl +++ b/src/mainboard/roda/rv11/dsdt.asl @@ -48,6 +48,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/samsung/lumpy/dsdt.asl b/src/mainboard/samsung/lumpy/dsdt.asl index 3ecabb5..eaa36468 100644 --- a/src/mainboard/samsung/lumpy/dsdt.asl +++ b/src/mainboard/samsung/lumpy/dsdt.asl @@ -54,6 +54,5 @@
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/samsung/stumpy/dsdt.asl b/src/mainboard/samsung/stumpy/dsdt.asl index 9fc9e2f..1298368 100644 --- a/src/mainboard/samsung/stumpy/dsdt.asl +++ b/src/mainboard/samsung/stumpy/dsdt.asl @@ -51,6 +51,5 @@
#include <vendorcode/google/chromeos/acpi/chromeos.asl>
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/scaleway/tagada/dsdt.asl b/src/mainboard/scaleway/tagada/dsdt.asl index bd32687..f970df9 100644 --- a/src/mainboard/scaleway/tagada/dsdt.asl +++ b/src/mainboard/scaleway/tagada/dsdt.asl @@ -49,6 +49,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/siemens/mc_apl1/dsdt.asl b/src/mainboard/siemens/mc_apl1/dsdt.asl index ae40f39..8e08b16 100644 --- a/src/mainboard/siemens/mc_apl1/dsdt.asl +++ b/src/mainboard/siemens/mc_apl1/dsdt.asl @@ -40,6 +40,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/supermicro/x11-lga1151-series/dsdt.asl b/src/mainboard/supermicro/x11-lga1151-series/dsdt.asl index b88b1d2..8d6dc2e 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/dsdt.asl +++ b/src/mainboard/supermicro/x11-lga1151-series/dsdt.asl @@ -41,7 +41,6 @@ } }
- // Chipset specific sleep states #include <southbridge/intel/common/acpi/sleepstates.asl>
// Mainboard specific diff --git a/src/mainboard/up/squared/dsdt.asl b/src/mainboard/up/squared/dsdt.asl index 6fccf49..94dc024 100644 --- a/src/mainboard/up/squared/dsdt.asl +++ b/src/mainboard/up/squared/dsdt.asl @@ -38,6 +38,5 @@ } }
- /* Chipset specific sleep states */ #include <southbridge/intel/common/acpi/sleepstates.asl> }
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