Attention is currently required from: Ravi kumar, Sudheer Amrabadi, Julius Werner, mturney mturney. Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50586 )
Change subject: drivers: spi_flash: Addressing mode change for SPI NOR ......................................................................
Patch Set 113:
(5 comments)
File src/drivers/spi/Kconfig:
https://review.coreboot.org/c/coreboot/+/50586/comment/62fa7dd1_0aba6697 PS113, Line 169: This will send an Exit 4-Byte Address Mode (E9h) command before the first
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Please fix.
https://review.coreboot.org/c/coreboot/+/50586/comment/ba75a42b_06751d05 PS113, Line 170: access to the SPI flash. On some platforms with SPI flashes larger than 32MB,
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Please fix.
https://review.coreboot.org/c/coreboot/+/50586/comment/9f249a47_39a7ae33 PS113, Line 171: the SPI flash may power up in 4-byte addressing mode and this command needs
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Please fix.
https://review.coreboot.org/c/coreboot/+/50586/comment/2a9dcde0_45e6d4a3 PS113, Line 172: to be sent before coreboot's 3-byte address commands can be interpreted correctly.
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Please fix.
https://review.coreboot.org/c/coreboot/+/50586/comment/f19c8587_8fba652d PS113, Line 173: On flashes that don't support 4-byte addressing mode or where it is already
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Please fix.