Change in ...coreboot[master]: soc/intel/{skl, cnl, icl}: Move cpuid(1) function into soc/intel/common...
Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30123
Change subject: soc/intel/{skl,cnl,icl}: Move cpuid(1) function into soc/intel/common/ code ......................................................................
soc/intel/{skl,cnl,icl}: Move cpuid(1) function into soc/intel/common/ code
This patch replaces all cpuid(1) references from soc/intel/{skl,cnl,icl} with intel cpu common code library functions.
1. cpu_get_cpuid() -> to get processor id (from cpuid.eax) 2. cpu_get_feature_flag -> to get processor feature flag (from cpuid.ecx)
Change-Id: Ib96a7c79dadb1feff0b8d58aa408b355fbb3bc50 Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/soc/intel/cannonlake/bootblock/report_platform.c M src/soc/intel/cannonlake/cpu.c M src/soc/intel/common/block/cpu/cpulib.c M src/soc/intel/common/block/include/intelblocks/cpulib.h M src/soc/intel/common/block/vmx/vmx.c M src/soc/intel/icelake/bootblock/report_platform.c M src/soc/intel/icelake/cpu.c M src/soc/intel/skylake/bootblock/report_platform.c M src/soc/intel/skylake/cpu.c 9 files changed, 77 insertions(+), 32 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/30123/1
diff --git a/src/soc/intel/cannonlake/bootblock/report_platform.c b/src/soc/intel/cannonlake/bootblock/report_platform.c index 17bcce9..54de85d 100644 --- a/src/soc/intel/cannonlake/bootblock/report_platform.c +++ b/src/soc/intel/cannonlake/bootblock/report_platform.c @@ -20,6 +20,7 @@ #include <cpu/x86/msr.h> #include <device/pci.h> #include <device/pci_ids.h> +#include <intelblocks/cpulib.h> #include <intelblocks/mp_init.h> #include <soc/bootblock.h> #include <soc/pch.h> @@ -96,7 +97,7 @@ static void report_cpu_info(void) { struct cpuid_result cpuidr; - u32 i, index; + u32 i, index, cpu_id, cpu_feature_flag; char cpu_string[50], *cpu_name = cpu_string; /* 48 bytes are reported */ int vt, txt, aes; msr_t microcode_ver; @@ -128,12 +129,12 @@ microcode_ver.lo = 0; microcode_ver.hi = 0; wrmsr(BIOS_SIGN_ID, microcode_ver); - cpuidr = cpuid(1); + cpu_id = cpu_get_cpuid(); microcode_ver = rdmsr(BIOS_SIGN_ID);
/* Look for string to match the name */ for (i = 0; i < ARRAY_SIZE(cpu_table); i++) { - if (cpu_table[i].cpuid == cpuidr.eax) { + if (cpu_table[i].cpuid == cpu_id) { cpu_type = cpu_table[i].name; break; } @@ -141,11 +142,12 @@
printk(BIOS_DEBUG, "CPU: %s\n", cpu_name); printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n", - cpuidr.eax, cpu_type, microcode_ver.hi); + cpu_id, cpu_type, microcode_ver.hi);
- aes = (cpuidr.ecx & (1 << 25)) ? 1 : 0; - txt = (cpuidr.ecx & (1 << 6)) ? 1 : 0; - vt = (cpuidr.ecx & (1 << 5)) ? 1 : 0; + cpu_feature_flag = cpu_get_feature_flag(); + aes = (cpu_feature_flag & (1 << 25)) ? 1 : 0; + txt = (cpu_feature_flag & (1 << 6)) ? 1 : 0; + vt = (cpu_feature_flag & (1 << 5)) ? 1 : 0; printk(BIOS_DEBUG, "CPU: AES %ssupported, TXT %ssupported, VT %ssupported\n", mode[aes], mode[txt], mode[vt]); diff --git a/src/soc/intel/cannonlake/cpu.c b/src/soc/intel/cannonlake/cpu.c index ccd1dea..d651985 100644 --- a/src/soc/intel/cannonlake/cpu.c +++ b/src/soc/intel/cannonlake/cpu.c @@ -104,12 +104,12 @@
static void configure_dca_cap(void) { - struct cpuid_result cpuid_regs; + uint32_t feature_flag; msr_t msr;
/* Check feature flag in CPUID.(EAX=1):ECX[18]==1 */ - cpuid_regs = cpuid(1); - if (cpuid_regs.ecx & (1 << 18)) { + feature_flag = cpu_get_feature_flag(); + if (feature_flag & (1 << 18)) { msr = rdmsr(IA32_PLATFORM_DCA_CAP); msr.lo |= 1; wrmsr(IA32_PLATFORM_DCA_CAP, msr); diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c index d18b50c..af7e7aa 100644 --- a/src/soc/intel/common/block/cpu/cpulib.c +++ b/src/soc/intel/common/block/cpu/cpulib.c @@ -335,3 +335,29 @@ (msr_t) {.lo = 0xffffffff, .hi = 0xffffffff}); } } + +/* + * Get processor id using cpuid eax=1 + * return value will be in EAX register + */ +uint32_t cpu_get_cpuid(void) +{ + struct cpuid_result cpuidr; + + cpuidr = cpuid(1); + + return cpuidr.eax; +} + +/* + * Get processor feature flag using cpuid eax=1 + * return value will be in ECX register + */ +uint32_t cpu_get_feature_flag(void) +{ + struct cpuid_result cpuidr; + + cpuidr = cpuid(1); + + return cpuidr.ecx; +} diff --git a/src/soc/intel/common/block/include/intelblocks/cpulib.h b/src/soc/intel/common/block/include/intelblocks/cpulib.h index 5cea96e..51d499e 100644 --- a/src/soc/intel/common/block/include/intelblocks/cpulib.h +++ b/src/soc/intel/common/block/include/intelblocks/cpulib.h @@ -167,4 +167,16 @@ /* Configure Machine Check Architecture support */ void mca_configure(void *unused);
+/* + * Get processor id using cpuid eax=1 + * return value will be in EAX register + */ +uint32_t cpu_get_cpuid(void); + +/* + * Get processor feature flag using cpuid eax=1 + * return value will be in ECX register + */ +uint32_t cpu_get_feature_flag(void); + #endif /* SOC_INTEL_COMMON_BLOCK_CPULIB_H */ diff --git a/src/soc/intel/common/block/vmx/vmx.c b/src/soc/intel/common/block/vmx/vmx.c index 2cffdab..4ef9359 100644 --- a/src/soc/intel/common/block/vmx/vmx.c +++ b/src/soc/intel/common/block/vmx/vmx.c @@ -13,6 +13,7 @@
#include <console/console.h> #include <cpu/x86/msr.h> +#include <intelblocks/cpulib.h> #include <intelblocks/msr.h> #include <intelblocks/vmx.h> #include <soc/cpu.h> @@ -46,11 +47,11 @@ void vmx_configure(void *unused) { msr_t msr; - struct cpuid_result regs; + uint32_t feature_flag;
- regs = cpuid(1); + feature_flag = cpu_get_feature_flag();
- if (!soc_vmx_enabled() || !(regs.ecx & CPUID_VMX)) { + if (!soc_vmx_enabled() || !(feature_flag & CPUID_VMX)) { printk(BIOS_ERR, "VMX: pre-conditions not met\n"); return; } diff --git a/src/soc/intel/icelake/bootblock/report_platform.c b/src/soc/intel/icelake/bootblock/report_platform.c index a5dcd77..07a45c1 100644 --- a/src/soc/intel/icelake/bootblock/report_platform.c +++ b/src/soc/intel/icelake/bootblock/report_platform.c @@ -19,6 +19,7 @@ #include <cpu/x86/msr.h> #include <device/pci.h> #include <device/pci_ids.h> +#include <intelblocks/cpulib.h> #include <intelblocks/mp_init.h> #include <soc/bootblock.h> #include <soc/pch.h> @@ -92,7 +93,7 @@ static void report_cpu_info(void) { struct cpuid_result cpuidr; - u32 i, index; + u32 i, index, cpu_id, cpu_feature_flag; char cpu_string[50], *cpu_name = cpu_string; /* 48 bytes are reported */ int vt, txt, aes; msr_t microcode_ver; @@ -124,12 +125,12 @@ microcode_ver.lo = 0; microcode_ver.hi = 0; wrmsr(BIOS_SIGN_ID, microcode_ver); - cpuidr = cpuid(1); + cpu_id = cpu_get_cpuid(); microcode_ver = rdmsr(BIOS_SIGN_ID);
/* Look for string to match the name */ for (i = 0; i < ARRAY_SIZE(cpu_table); i++) { - if (cpu_table[i].cpuid == cpuidr.eax) { + if (cpu_table[i].cpuid == cpu_id) { cpu_type = cpu_table[i].name; break; } @@ -137,11 +138,12 @@
printk(BIOS_DEBUG, "CPU: %s\n", cpu_name); printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n", - cpuidr.eax, cpu_type, microcode_ver.hi); + cpu_id, cpu_type, microcode_ver.hi);
- aes = (cpuidr.ecx & (1 << 25)) ? 1 : 0; - txt = (cpuidr.ecx & (1 << 6)) ? 1 : 0; - vt = (cpuidr.ecx & (1 << 5)) ? 1 : 0; + cpu_feature_flag = cpu_get_feature_flag(); + aes = (cpu_feature_flag & (1 << 25)) ? 1 : 0; + txt = (cpu_feature_flag & (1 << 6)) ? 1 : 0; + vt = (cpu_feature_flag & (1 << 5)) ? 1 : 0; printk(BIOS_DEBUG, "CPU: AES %ssupported, TXT %ssupported, VT %ssupported\n", mode[aes], mode[txt], mode[vt]); diff --git a/src/soc/intel/icelake/cpu.c b/src/soc/intel/icelake/cpu.c index bfe9f7be..26b5414 100644 --- a/src/soc/intel/icelake/cpu.c +++ b/src/soc/intel/icelake/cpu.c @@ -105,12 +105,12 @@
static void configure_dca_cap(void) { - struct cpuid_result cpuid_regs; + uint32_t feature_flag; msr_t msr;
/* Check feature flag in CPUID.(EAX=1):ECX[18]==1 */ - cpuid_regs = cpuid(1); - if (cpuid_regs.ecx & (1 << 18)) { + feature_flag = cpu_get_feature_flag(); + if (feature_flag & (1 << 18)) { msr = rdmsr(IA32_PLATFORM_DCA_CAP); msr.lo |= 1; wrmsr(IA32_PLATFORM_DCA_CAP, msr); diff --git a/src/soc/intel/skylake/bootblock/report_platform.c b/src/soc/intel/skylake/bootblock/report_platform.c index 7dbd371..5b34a16 100644 --- a/src/soc/intel/skylake/bootblock/report_platform.c +++ b/src/soc/intel/skylake/bootblock/report_platform.c @@ -20,6 +20,7 @@ #include <cpu/x86/msr.h> #include <device/pci.h> #include <device/pci_ids.h> +#include <intelblocks/cpulib.h> #include <intelblocks/mp_init.h> #include <soc/bootblock.h> #include <soc/cpu.h> @@ -121,7 +122,7 @@ static void report_cpu_info(void) { struct cpuid_result cpuidr; - u32 i, index; + u32 i, index, cpu_id, cpu_feature_flag; char cpu_string[50], *cpu_name = cpu_string; /* 48 bytes are reported */ int vt, txt, aes; msr_t microcode_ver; @@ -149,12 +150,12 @@ microcode_ver.lo = 0; microcode_ver.hi = 0; wrmsr(IA32_BIOS_SIGN_ID, microcode_ver); - cpuidr = cpuid(1); + cpu_id = cpu_get_cpuid(); microcode_ver = rdmsr(IA32_BIOS_SIGN_ID);
/* Look for string to match the name */ for (i = 0; i < ARRAY_SIZE(cpu_table); i++) { - if (cpu_table[i].cpuid == cpuidr.eax) { + if (cpu_table[i].cpuid == cpu_id) { cpu_type = cpu_table[i].name; break; } @@ -164,9 +165,10 @@ printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n", cpuidr.eax, cpu_type, microcode_ver.hi);
- aes = (cpuidr.ecx & (1 << 25)) ? 1 : 0; - txt = (cpuidr.ecx & (1 << 6)) ? 1 : 0; - vt = (cpuidr.ecx & (1 << 5)) ? 1 : 0; + cpu_feature_flag = cpu_get_feature_flag(); + aes = (cpu_feature_flag & (1 << 25)) ? 1 : 0; + txt = (cpu_feature_flag & (1 << 6)) ? 1 : 0; + vt = (cpu_feature_flag & (1 << 5)) ? 1 : 0; printk(BIOS_DEBUG, "CPU: AES %ssupported, TXT %ssupported, VT %ssupported\n", mode[aes], mode[txt], mode[vt]); diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c index 9e4bbe8..2a9a446 100644 --- a/src/soc/intel/skylake/cpu.c +++ b/src/soc/intel/skylake/cpu.c @@ -333,12 +333,12 @@
static void configure_dca_cap(void) { - struct cpuid_result cpuid_regs; + uint32_t feature_flag; msr_t msr;
/* Check feature flag in CPUID.(EAX=1):ECX[18]==1 */ - cpuid_regs = cpuid(1); - if (cpuid_regs.ecx & (1 << 18)) { + feature_flag = cpu_get_feature_flag(); + if (feature_flag & (1 << 18)) { msr = rdmsr(IA32_PLATFORM_DCA_CAP); msr.lo |= 1; wrmsr(IA32_PLATFORM_DCA_CAP, msr);
-
Subrata Banik (Code Review)