[L] Change in coreboot[master]: added bare Asrock H370m-ITX support

[Felix Singer (Code Review)]

Attention is currently required from: Name of user not set #1004406.

Felix Singer has posted comments on this change by Name of user not set #1004406. ( https://review.coreboot.org/c/coreboot/+/65225?usp=email )

Change subject: added bare Asrock H370m-ITX support
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Patch Set 6:

(6 comments)

Patchset:

PS6:
> hi, i want to continue work on this PR. but i want fix some problems: […]

I would start with rebasing on the main branch, so that we don't try to debug a very old state. See my other comments.

File src/mainboard/asrock/h370m/Makefile.inc:

PS6: 
Please rename this file to `Makefile.mk`

File src/mainboard/asrock/h370m/devicetree.cb:

https://review.coreboot.org/c/coreboot/+/65225/comment/9b455aeb_3a2d2639?usp... :
PS6, Line 3: device cpu_cluster 0 on
           : 		device lapic 0 on end
           : 	end
Not needed anymore.

https://review.coreboot.org/c/coreboot/+/65225/comment/1e540451_648d4d9f?usp... :
PS6, Line 8: 	register "RMT" = "0"
Set to 0 by default, remove.

https://review.coreboot.org/c/coreboot/+/65225/comment/d5ba09e3_d06bcdf0?usp... :
PS6, Line 14: 	device domain 0 on
Please have a look in `src/soc/intel/cannonlake/chipset_pch_h.cb` and use the alias names instead of like `pci 00.0`. There are many other mainboards in the tree using them. So you have some examples.

Also, remove PCI devices which have an equivalent configuration in the chipset device tree and remove devices which are turned off anyway.

File src/mainboard/asrock/h370m/ramstage.c:

https://review.coreboot.org/c/coreboot/+/65225/comment/d2169185_9ca58d8b?usp... :
PS6, Line 12: 	gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
We don't do the GPIO configuration before the FSP-S runs. In some cases, FSP did GPIO configuration itself. So in order to be sure only our configuration is used, we do the configuration after FSP-S.

Please have a look into `src/mainboard/kontron/bsl6/ramstage.c` and use that way. You can do that in this file, but just move the configuration into the chip_operations driver as shown in the other mainboard.