Attention is currently required from: Tim Wawrzynczak. Varshit B Pandya has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/62945 )
Change subject: ec/google: Add PSRC and PBOK method ......................................................................
ec/google: Add PSRC and PBOK method
As per Intel Dynamic Tuning revision 1.3.13 add support for PSRC and PBOK under _SB.DPTF.TPWR device ec_fill_dptf_helpers() is used to generate all the helper function that DPTF requires.
BUG=b:205928013 TEST=Buil, boot brya0 and dump SSDT to check methods
Signed-off-by: Varshit B Pandya varshit.b.pandya@intel.com Change-Id: Ia536a9e1528f6e415247eca9ed2b0b685eb73196 --- M src/ec/google/chromeec/ec_dptf_helpers.c 1 file changed, 46 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/62945/1
diff --git a/src/ec/google/chromeec/ec_dptf_helpers.c b/src/ec/google/chromeec/ec_dptf_helpers.c index 94b13fb..3ecba8d 100644 --- a/src/ec/google/chromeec/ec_dptf_helpers.c +++ b/src/ec/google/chromeec/ec_dptf_helpers.c @@ -114,6 +114,43 @@ acpigen_pop_len(); /* Method _FST */ }
+static void write_power_psrc(const struct device *ec) +{ + acpigen_write_method_serialized("PSRC", 0); + /* Local0 = _SB.PCI0.LPCB.EC0.PWRT */ + acpigen_write_store(); + acpigen_emit_namestring(acpi_device_path_join(ec, "PWRT")); + acpigen_emit_byte(LOCAL0_OP); + + /* Return ((Local0 && 0x0F)) */ + acpigen_emit_byte(RETURN_OP); + acpigen_emit_byte(LAND_OP); + acpigen_emit_byte(LOCAL0_OP); + acpigen_write_byte(0x0F); + + acpigen_pop_len(); /* Method PSRC */ +} + +static void write_power_pbok(const struct device *ec) +{ + acpigen_write_method_serialized("PBOK", 1); + + acpigen_write_store(); + acpigen_emit_byte(ARG0_OP); + acpigen_emit_byte(LOCAL0_OP); + + acpigen_emit_byte(AND_OP); + acpigen_emit_byte(LOCAL0_OP); + acpigen_write_byte(0x0F); + acpigen_emit_byte(LOCAL0_OP); + + acpigen_write_store(); + acpigen_emit_byte(LOCAL0_OP); + acpigen_emit_namestring(acpi_device_path_join(ec, "PBOK")); + + acpigen_pop_len(); /* Method PBOK */ +} + static void write_fan_fsl(const struct device *ec) { /* _FSL */ @@ -302,6 +339,14 @@ acpigen_pop_len(); /* Scope */ }
+static void write_power_methods(const struct device *ec) +{ + dptf_write_scope(DPTF_TPWR); + write_power_psrc(ec); + write_power_pbok(ec); + acpigen_pop_len(); /* Scope */ +} + static void write_thermal_methods(const struct device *ec, enum dptf_participant participant, int tsr_index) { @@ -354,6 +399,7 @@ write_dppm_methods(ec); write_charger_methods(ec); write_fan_methods(ec); + write_power_methods(ec);
for (p = DPTF_TEMP_SENSOR_0, i = 0; p <= DPTF_TEMP_SENSOR_4; ++p, ++i) write_thermal_methods(ec, p, i);