[M] Change in coreboot[master]: mb/google/brya/gaelin: Change DDR4 from interleave to non-interleave

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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68806 )

Change subject: mb/google/brya/gaelin: Change DDR4 from interleave to non-interleave
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Patch Set 1:

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Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161210):
https://review.coreboot.org/c/coreboot/+/68806/comment/5aa29211_bcf9a8c1 
PS1, Line 9: The brask DDR4 is set to interleave, due to the limited number of gaelin PCB layers and the traces need to be smooth, we will use non-interleave for gaelin DDR4.
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