Attention is currently required from: Paul Menzel, Tim Wawrzynczak, Arthur Heymans. Hello Paul Menzel, Tim Wawrzynczak, Lean Sheng Tan,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/63788
to look at the new patch set (#4).
Change subject: cpu/intel/*: Set SMM SMRR code access check bit ......................................................................
cpu/intel/*: Set SMM SMRR code access check bit
This makes sure that only code in TSEG gets executed. See section 34.17.1 "SMM Handler Code Access Control" in the 'Intel 64 and IA-32 Architectures Software Developer’s Manual'
Change-Id: I254fb348483d2873917cf8c94c8b60e6f2d2c4e7 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/cpu/intel/haswell/finalize.c M src/include/cpu/intel/smm_reloc.h M src/soc/intel/common/block/smm/smihandler.c M src/soc/intel/denverton_ns/smihandler.c 4 files changed, 45 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/63788/4