Change in coreboot[master]: cpu,nb/intel: Drop remains of LAPIC_MONOTONIC_TIMER

[Kyösti Mälkki (Code Review)]

Attention is currently required from: Damien Zammit, Angel Pons, Patrick Rudolph.
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55413 )

Change subject: cpu,nb/intel: Drop remains of LAPIC_MONOTONIC_TIMER
......................................................................

Patch Set 9:

(2 comments)

File src/cpu/intel/model_1067x/model_1067x_init.c:

https://review.coreboot.org/c/coreboot/+/55413/comment/8ead0e55_59db0a27 
PS1, Line 18: 	lapic_write(LAPIC_LVTT, (1 << 17) | (1 << 16) | (0 << 12) | (0 << 0));
> For Intel CPUs, only model_1067x enters payload with LAPIC timer initialised. […]

Ack

File src/northbridge/intel/gm45/romstage.c:

https://review.coreboot.org/c/coreboot/+/55413/comment/ac7f1611_7272a289 
PS1, Line 45: 	enable_lapic();
> I'd explain in the commit message why these `enable_lapic()` calls are dropped. […]

Done