[L] Change in coreboot[main]: [WIP] OptiPlex 3050 port

[Angel Pons (Code Review)]

Attention is currently required from: Felix Singer, Máté Kukri.

Angel Pons has posted comments on this change by Máté Kukri. ( https://review.coreboot.org/c/coreboot/+/82053?usp=email )

Change subject: [WIP] OptiPlex 3050 port
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Patch Set 11: Code-Review+1

(15 comments)

File src/mainboard/dell/optiplex_3050/Kconfig:

https://review.coreboot.org/c/coreboot/+/82053/comment/88209e4b_27467b66?usp... :
PS11, Line 12: 	# select INTEL_GMA_HAVE_VBT
Is this a FIXME?

https://review.coreboot.org/c/coreboot/+/82053/comment/bcb01e2a_c6cef7ee?usp... :
PS11, Line 30: config PRERAM_CBMEM_CONSOLE_SIZE
             : 	hex
             : 	default 0xd00
Is this needed? If not, I'd drop it. If it's worth keeping, I'd remove the type:

```suggestion
config PRERAM_CBMEM_CONSOLE_SIZE
    default 0xd00
```

File src/mainboard/dell/optiplex_3050/acpi/dptf.asl:

PS11: 
Is this tested?

File src/mainboard/dell/optiplex_3050/bootblock.c:

https://review.coreboot.org/c/coreboot/+/82053/comment/670598bb_c6b0f214?usp... :
PS11, Line 55: 	sch5555_mbox_read(1, 0xb8);
I wonder what these reads do

https://review.coreboot.org/c/coreboot/+/82053/comment/6c9317b3_f825d0c7?usp... :
PS11, Line 93: 	// Super I/O early init will map Runtime and EMI registers
nit: Consistent C vs C++ comment style?

https://review.coreboot.org/c/coreboot/+/82053/comment/c9fc9131_23375059?usp... :
PS11, Line 96: 	// Changes LED color among a few other things
Is the functioning of these bits known?

File src/mainboard/dell/optiplex_3050/cmos.default:

https://review.coreboot.org/c/coreboot/+/82053/comment/462142ff_3ec89067?usp... :
PS11, Line 6: nmi=Enable
Not implemented for this platform, please drop

File src/mainboard/dell/optiplex_3050/cmos.layout:

https://review.coreboot.org/c/coreboot/+/82053/comment/30750e79_e0de7f6e?usp... :
PS11, Line 21: 408	1	e	1	nmi
Not implemented for this platform, please drop

File src/mainboard/dell/optiplex_3050/devicetree.cb:

https://review.coreboot.org/c/coreboot/+/82053/comment/f5b762a1_2695b549?usp... :
PS11, Line 36: 	register "SendVrMbxCmd" = "2"
Is this copy-pasta?

https://review.coreboot.org/c/coreboot/+/82053/comment/e911ff03_f7ce46eb?usp... :
PS11, Line 76: 		# ME interface is 'off' to avoid HECI reset delay due to HAP
Would be nice to auto-disable at runtime.

https://review.coreboot.org/c/coreboot/+/82053/comment/5a74ea7c_11e6e552?usp... :
PS11, Line 110: 			register "SerialIoDevMode" = "{ [PchSerialIoIndexUart0] = PchSerialIoPci, }"
```suggestion
    		register "SerialIoDevMode[PchSerialIoIndexUart0]" = "PchSerialIoPci"
```

File src/mainboard/dell/optiplex_3050/dsdt.asl:

https://review.coreboot.org/c/coreboot/+/82053/comment/fea6fae1_c422f42f?usp... :
PS11, Line 17: Scope (_SB) {
             : 		Device (PCI0)
             : 		{
nit: Be consistent with starting brace placement

File src/mainboard/dell/optiplex_3050/include/gpio.h:

https://review.coreboot.org/c/coreboot/+/82053/comment/87de652a_43516af6?usp... :
PS11, Line 15: /* Pad configuration was generated automatically using intelp2m utility */
intelp2m has some command-line args to generate pretty macros, I think you have to tell it to ignore unknown values or something (the `1 << 1` stuff)

https://review.coreboot.org/c/coreboot/+/82053/comment/edae5c06_a901c3d4?usp... :
PS11, Line 87:         PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1), /* UART0_RXD */
> `code indent should use tabs where possible`

Please fix.

File src/mainboard/dell/optiplex_3050/romstage.c:

https://review.coreboot.org/c/coreboot/+/82053/comment/d593782e_39e6253a?usp... :
PS11, Line 24: 	 * FIXME: do we need this? */
I think this is used with HDA. I think it should be auto-configured.