[S] Change in coreboot[master]: soc/intel/xeon_sp: use VGA_MMIO_* defines from arch/vga.h
Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/75669?usp=email )
Change subject: soc/intel/xeon_sp: use VGA_MMIO_* defines from arch/vga.h ......................................................................
soc/intel/xeon_sp: use VGA_MMIO_* defines from arch/vga.h
Now that we have x86 architecture specific VGA_MMIO_* defines in arch/vga.h, use those instead of having SoC-specific defines for this.
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: I77b914d563bdc83e7fad7d7fccd5cf7777cb4918 --- M src/soc/intel/xeon_sp/cpx/soc_acpi.c M src/soc/intel/xeon_sp/include/soc/iomap.h M src/soc/intel/xeon_sp/skx/soc_acpi.c M src/soc/intel/xeon_sp/spr/soc_acpi.c M src/soc/intel/xeon_sp/uncore.c 5 files changed, 11 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/75669/1
diff --git a/src/soc/intel/xeon_sp/cpx/soc_acpi.c b/src/soc/intel/xeon_sp/cpx/soc_acpi.c index e8abd77..52afe45 100644 --- a/src/soc/intel/xeon_sp/cpx/soc_acpi.c +++ b/src/soc/intel/xeon_sp/cpx/soc_acpi.c @@ -2,6 +2,7 @@
#include <acpi/acpigen.h> #include <arch/smp/mpspec.h> +#include <arch/vga.h> #include <assert.h> #include <cpu/intel/turbo.h> #include <device/mmio.h> @@ -87,9 +88,8 @@
/* additional mem32 resources on socket 0 bus 0 */ if (stack == 0) { - acpigen_resource_dword(0, 0xc, 3, 0, VGA_BASE_ADDRESS, - (VGA_BASE_ADDRESS + VGA_BASE_SIZE - 1), 0x0, - VGA_BASE_SIZE); + acpigen_resource_dword(0, 0xc, 3, 0, VGA_MMIO_BASE, + VGA_MMIO_LIMIT, 0x0, VGA_MMIO_SIZE); acpigen_resource_dword(0, 0xc, 1, 0, SPI_BASE_ADDRESS, (SPI_BASE_ADDRESS + SPI_BASE_SIZE - 1), 0x0, SPI_BASE_SIZE); diff --git a/src/soc/intel/xeon_sp/include/soc/iomap.h b/src/soc/intel/xeon_sp/include/soc/iomap.h index 5daf62b..f348ab9 100644 --- a/src/soc/intel/xeon_sp/include/soc/iomap.h +++ b/src/soc/intel/xeon_sp/include/soc/iomap.h @@ -22,10 +22,6 @@ #define ACPI_BASE_ADDRESS CONFIG_INTEL_ACPI_BASE_ADDRESS #define ACPI_BASE_SIZE 0x100
-/* Video RAM */ -#define VGA_BASE_ADDRESS 0xa0000 -#define VGA_BASE_SIZE 0x20000 - #define HECI1_BASE_ADDRESS 0xfed1a000
#define PCH_PWRM_BASE_ADDRESS CONFIG_INTEL_PCH_PWRM_BASE_ADDRESS diff --git a/src/soc/intel/xeon_sp/skx/soc_acpi.c b/src/soc/intel/xeon_sp/skx/soc_acpi.c index 33e7c1a..cba9a35 100644 --- a/src/soc/intel/xeon_sp/skx/soc_acpi.c +++ b/src/soc/intel/xeon_sp/skx/soc_acpi.c @@ -2,6 +2,7 @@
#include <acpi/acpigen.h> #include <arch/smp/mpspec.h> +#include <arch/vga.h> #include <assert.h> #include <cpu/intel/turbo.h> #include <device/mmio.h> @@ -118,9 +119,8 @@
// additional mem32 resources on socket 0 bus 0 if (socket == 0 && stack == 0) { - acpigen_resource_dword(0, 0xc, 3, 0, VGA_BASE_ADDRESS, - (VGA_BASE_ADDRESS + VGA_BASE_SIZE - 1), 0x0, - VGA_BASE_SIZE); + acpigen_resource_dword(0, 0xc, 3, 0, VGA_MMIO_BASE, + VGA_MMIO_LIMIT, 0x0, VGA_MMIO_SIZE); acpigen_resource_dword(0, 0xc, 1, 0, SPI_BASE_ADDRESS, (SPI_BASE_ADDRESS + SPI_BASE_SIZE - 1), 0x0, SPI_BASE_SIZE); diff --git a/src/soc/intel/xeon_sp/spr/soc_acpi.c b/src/soc/intel/xeon_sp/spr/soc_acpi.c index 5340b7b..532305e 100644 --- a/src/soc/intel/xeon_sp/spr/soc_acpi.c +++ b/src/soc/intel/xeon_sp/spr/soc_acpi.c @@ -2,6 +2,7 @@
#include <acpi/acpigen.h> #include <arch/smp/mpspec.h> +#include <arch/vga.h> #include <assert.h> #include <cbmem.h> #include <cpu/intel/turbo.h> @@ -131,9 +132,8 @@
/* Additional Mem32 resources on socket 0 bus 0 */ if (socket == 0 && stack == 0) { - acpigen_resource_dword(0, 0xc, 3, 0, VGA_BASE_ADDRESS, - (VGA_BASE_ADDRESS + VGA_BASE_SIZE - 1), 0x0, - VGA_BASE_SIZE); + acpigen_resource_dword(0, 0xc, 3, 0, VGA_MMIO_BASE, + VGA_MMIO_LIMIT, 0x0, VGA_MMIO_SIZE); acpigen_resource_dword(0, 0xc, 1, 0, SPI_BASE_ADDRESS, (SPI_BASE_ADDRESS + SPI_BASE_SIZE - 1), 0x0, SPI_BASE_SIZE); diff --git a/src/soc/intel/xeon_sp/uncore.c b/src/soc/intel/xeon_sp/uncore.c index 3744359..66f63d5 100644 --- a/src/soc/intel/xeon_sp/uncore.c +++ b/src/soc/intel/xeon_sp/uncore.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */
+#include <arch/vga.h> #include <cbmem.h> #include <console/console.h> #include <cpu/x86/lapic_def.h> @@ -306,7 +307,7 @@ * 0xa0000 - 0xbffff: legacy VGA * 0xc0000 - 0xfffff: RAM */ - res = mmio_range(dev, index++, VGA_BASE_ADDRESS, VGA_BASE_SIZE); + res = mmio_range(dev, index++, VGA_MMIO_BASE, VGA_MMIO_SIZE); LOG_RESOURCE("legacy_mmio", dev, res);
res = reserved_ram_from_to(dev, index++, 0xc0000, 1 * MiB);
-
Felix Held (Code Review)