Change in coreboot[master]: xeon_sp/cpx: Update meminfo max_capacity_mib and number_of_devices

[Johnny Lin (Code Review)]

Attention is currently required from: Marc Jones, Jonathan Zhang, Jingle Hsu, Angel Pons, Morgan Jang, Patrick Rudolph, Tim Chu.
Johnny Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49893 )

Change subject: xeon_sp/cpx: Update meminfo max_capacity_mib and number_of_devices
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Patch Set 3:

(2 comments)

File src/soc/intel/xeon_sp/cpx/romstage.c:

https://review.coreboot.org/c/coreboot/+/49893/comment/7955c232_e45c9520 
PS2, Line 24: mainboard_memory_max_capacity_mib
> Return the maximum memory supported by one processor, multiplied by CONFIG_MAX_SOCKET?

Done

https://review.coreboot.org/c/coreboot/+/49893/comment/cf235e5d_15297265 
PS2, Line 68: mainboard_memory_max_number_of_devices()
> CONFIG_DIMM_MAX

Done