New patch to review for coreboot: ca5b6d9 bd82x6x: Add smbus_write_byte

[Vladimir Serbinenko]

Vladimir Serbinenko ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4838

-gerrit

commit ca5b6d9bf745d884fc62b20f694c81d02640e940
Author: Vladimir Serbinenko 
Date:   Mon Jan 27 23:48:27 2014 +0100

bd82x6x: Add smbus_write_byte

Change-Id: Iaab076cc014a1ee463866c243636f4f71798ddc4
    Signed-off-by: Vladimir Serbinenko 
---
 src/southbridge/intel/bd82x6x/smbus.c | 57 +++++++++++++++++++++++++++++++++++
 1 file changed, 57 insertions(+)

diff --git a/src/southbridge/intel/bd82x6x/smbus.c b/src/southbridge/intel/bd82x6x/smbus.c
index 4786d8b..6d4e457 100644
--- a/src/southbridge/intel/bd82x6x/smbus.c
+++ b/src/southbridge/intel/bd82x6x/smbus.c
@@ -58,8 +58,65 @@ static int lsmbus_read_byte(device_t dev, u8 address)
    return do_smbus_read_byte(res->base, device, address);
 }

+static  int do_smbus_write_byte(unsigned smbus_base, unsigned device, unsigned address, unsigned data)
+{
+	unsigned char global_status_register;
+
+	if (smbus_wait_until_ready(smbus_base) < 0)
+		return SMBUS_WAIT_UNTIL_READY_TIMEOUT;
+
+	/* Setup transaction */
+	/* Disable interrupts */
+	outb(inb(smbus_base + SMBHSTCTL) & (~1), smbus_base + SMBHSTCTL);
+	/* Set the device I'm talking too */
+	outb(((device & 0x7f) << 1) & ~0x01, smbus_base + SMBXMITADD);
+	/* Set the command/address... */
+	outb(address & 0xff, smbus_base + SMBHSTCMD);
+	/* Set up for a byte data read */
+	outb((inb(smbus_base + SMBHSTCTL) & 0xe3) | (0x2 << 2),
+	     (smbus_base + SMBHSTCTL));
+	/* Clear any lingering errors, so the transaction will run */
+	outb(inb(smbus_base + SMBHSTSTAT), smbus_base + SMBHSTSTAT);
+
+	/* Clear the data byte... */
+	outb(data, smbus_base + SMBHSTDAT0);
+
+	/* Start the command */
+	outb((inb(smbus_base + SMBHSTCTL) | 0x40),
+	     smbus_base + SMBHSTCTL);
+
+	/* Poll for transaction completion */
+	if (smbus_wait_until_done(smbus_base) < 0)
+		return SMBUS_WAIT_UNTIL_DONE_TIMEOUT;
+
+	global_status_register = inb(smbus_base + SMBHSTSTAT);
+
+	/* Ignore the "In Use" status... */
+	global_status_register &= ~(3 << 5);
+
+	/* Read results of transaction */
+	if (global_status_register != (1 << 1))
+		return SMBUS_ERROR;
+
+	return 0;
+}
+
+static int lsmbus_write_byte(device_t dev, u8 address, u8 val)
+{
+	u16 device;
+	struct resource *res;
+	struct bus *pbus;
+
+	device = dev->path.i2c.device;
+	pbus = get_pbus_smbus(dev);
+	res = find_resource(pbus->dev, 0x20);
+
+	return do_smbus_write_byte(res->base, device, address, val);
+}
+
 static struct smbus_bus_operations lops_smbus_bus = {
    .read_byte	= lsmbus_read_byte,
+	.write_byte	= lsmbus_write_byte,
 };

static void smbus_set_subsystem(device_t dev, unsigned vendor, unsigned device)