Patrick Georgi (pgeorgi@google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9352
-gerrit
commit 1315b60dc975aecab84b3f7803cec92d18b35977 Author: Vadim Bendebury vbendeb@chromium.org Date: Wed Oct 15 16:13:45 2014 -0700
bg4cd: add uart driver skeleton
This adds the file to be filled up with the uart driver implementation for bg4cd.
The console driver structure when required is provided by src/console/uart_wrapper.c.
BRANCH=none BUG=chrome-os-partner:32772 TEST=none yet, this file is not event being compiled
Change-Id: I9bf02f9d8e253764faa3a3b0424736cba66a8cda Signed-off-by: Patrick Georgi pgeorgi@chromium.org Original-Commit-Id: 99b13bf9da92c772621094e5da31277362388b1f Original-Change-Id: I73c12ddcd6f5099cc2196820452e714eeb736cdc Original-Signed-off-by: Vadim Bendebury vbendeb@chromium.org Original-Reviewed-on: https://chromium-review.googlesource.com/223595 Original-Reviewed-by: Aaron Durbin adurbin@chromium.org --- src/soc/marvell/bg4cd/uart.c | 47 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+)
diff --git a/src/soc/marvell/bg4cd/uart.c b/src/soc/marvell/bg4cd/uart.c new file mode 100644 index 0000000..3de37c0 --- /dev/null +++ b/src/soc/marvell/bg4cd/uart.c @@ -0,0 +1,47 @@ +/* + * This file is part of the coreboot project. + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <uart.h> + +void uart_init(void) +{ +} + +void uart_tx_byte(unsigned char data) +{ +} + +int uart_can_rx_byte(void) +{ + return 0; +} + +void uart_tx_flush(void) +{ +} + +unsigned char uart_rx_byte(void) +{ + return '\0'; +} + +/* Not really needed on this chip, but helps to keep coreboot table happy. */ +u32 uartmem_getbaseaddr(void) +{ + return 0; +}