[S] Change in coreboot[main]: tree: Change set_msip(int, int) to set_msip(uintptr_t, int)

[Elyes Haouas (Code Review)]

Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83399?usp=email )

Change subject: tree: Change set_msip(int, int) to set_msip(uintptr_t, int)
......................................................................

tree: Change set_msip(int, int) to set_msip(uintptr_t, int)

Change-Id: I23a10d5ac276817b9c533e74d7f309a26193d2ee
Signed-off-by: Elyes Haouas 
---
M src/arch/riscv/include/mcall.h
M src/arch/riscv/sbi.c
M src/mainboard/emulation/qemu-riscv/clint.c
M src/mainboard/emulation/spike-riscv/clint.c
M src/soc/sifive/fu540/clint.c
M src/soc/sifive/fu740/clint.c
6 files changed, 10 insertions(+), 10 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/83399/1

diff --git a/src/arch/riscv/include/mcall.h b/src/arch/riscv/include/mcall.h
index c6ed7d8..3d57f46 100644
--- a/src/arch/riscv/include/mcall.h
+++ b/src/arch/riscv/include/mcall.h
@@ -78,7 +78,7 @@
  * a bit, a byte, a word, and so on.
  * So we can't provide code that is related to implementation.
  */
-void set_msip(int hartid, int val);
+void set_msip(uintptr_t hartid, int val);

#endif // __ASSEMBLER__

diff --git a/src/arch/riscv/sbi.c b/src/arch/riscv/sbi.c
index 2ef7625..ca287da 100644
--- a/src/arch/riscv/sbi.c
+++ b/src/arch/riscv/sbi.c
@@ -12,7 +12,7 @@
 static uintptr_t send_ipi(uintptr_t *pmask, intptr_t type)
 {
    uintptr_t mask = mprv_read_uintptr_t(pmask);
-	for (int i = 0; mask; i++) {
+	for (uintptr_t i = 0; mask; i++) {
    	if (mask & 1) {
    		OTHER_HLS(i)->ipi_pending |= type;
    		/* send soft interrupt to target hart */
diff --git a/src/mainboard/emulation/qemu-riscv/clint.c b/src/mainboard/emulation/qemu-riscv/clint.c
index 10827fa..f755254 100644
--- a/src/mainboard/emulation/qemu-riscv/clint.c
+++ b/src/mainboard/emulation/qemu-riscv/clint.c
@@ -12,7 +12,7 @@
    HLS()->timecmp = (uint64_t *)(QEMU_VIRT_CLINT + 0x4000 + 8 * hart_id);
 }

-void set_msip(int hartid, int val)
+void set_msip(uintptr_t hartid, int val)
 {
-	write32((void *)(QEMU_VIRT_CLINT + 4 * (uintptr_t)hartid), !!val);
+	write32((void *)(QEMU_VIRT_CLINT + 4 * hartid), !!val);
 }
diff --git a/src/mainboard/emulation/spike-riscv/clint.c b/src/mainboard/emulation/spike-riscv/clint.c
index 4d45bce..db13b32 100644
--- a/src/mainboard/emulation/spike-riscv/clint.c
+++ b/src/mainboard/emulation/spike-riscv/clint.c
@@ -13,7 +13,7 @@
    HLS()->timecmp = (uint64_t *)(SPIKE_CLINT_BASE + 0x4000 + 8 * hart_id);
 }

-void set_msip(int hartid, int val)
+void set_msip(uintptr_t hartid, int val)
 {
-	write32((void *)(SPIKE_CLINT_BASE + 4 * (uintptr_t)hartid), !!val);
+	write32((void *)(SPIKE_CLINT_BASE + 4 * hartid), !!val);
 }
diff --git a/src/soc/sifive/fu540/clint.c b/src/soc/sifive/fu540/clint.c
index 08124d3..4366aa8 100644
--- a/src/soc/sifive/fu540/clint.c
+++ b/src/soc/sifive/fu540/clint.c
@@ -12,7 +12,7 @@
    HLS()->timecmp = (uint64_t *)(FU540_CLINT + 0x4000 + 8 * hart_id);
 }

-void set_msip(int hartid, int val)
+void set_msip(uintptr_t hartid, int val)
 {
-	write32((void *)(FU540_CLINT + 4 * (uintptr_t)hartid), !!val);
+	write32((void *)(FU540_CLINT + 4 * hartid), !!val);
 }
diff --git a/src/soc/sifive/fu740/clint.c b/src/soc/sifive/fu740/clint.c
index 818b628..cba0176 100644
--- a/src/soc/sifive/fu740/clint.c
+++ b/src/soc/sifive/fu740/clint.c
@@ -15,7 +15,7 @@
    HLS()->timecmp = (uint64_t *)(FU740_CLINT + CLINT_MTIMECMP + 8 * hart_id);
 }

-void set_msip(int hartid, int val)
+void set_msip(uintptr_t hartid, int val)
 {
-	write32((void *)(FU740_CLINT + 4 * (uintptr_t)hartid), !!val);
+	write32((void *)(FU740_CLINT + 4 * hartid), !!val);
 }