HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45615 )
Change subject: nb/intel/gm45: Move DEFAULT_MCHBAR to Kconfig ......................................................................
nb/intel/gm45: Move DEFAULT_MCHBAR to Kconfig
Change-Id: I5544d398c43ab9f0f85db69b2a9d9075d5598ec2 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/gm45/Kconfig M src/northbridge/intel/gm45/acpi/gm45.asl M src/northbridge/intel/gm45/early_init.c M src/northbridge/intel/gm45/gm45.h M src/northbridge/intel/gm45/pcie.c 5 files changed, 10 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/45615/1
diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig index f5d6712..788e15a 100644 --- a/src/northbridge/intel/gm45/Kconfig +++ b/src/northbridge/intel/gm45/Kconfig @@ -14,6 +14,10 @@ select INTEL_GMA_SSC_ALTERNATE_REF select PARALLEL_MP
+config DEFAULT_MCHBAR + hex + default 0xfed14000 + config VBOOT select VBOOT_STARTS_IN_BOOTBLOCK select VBOOT_SEPARATE_VERSTAGE diff --git a/src/northbridge/intel/gm45/acpi/gm45.asl b/src/northbridge/intel/gm45/acpi/gm45.asl index af58e0e..2051afa 100644 --- a/src/northbridge/intel/gm45/acpi/gm45.asl +++ b/src/northbridge/intel/gm45/acpi/gm45.asl @@ -14,7 +14,7 @@ // now. Name (PDRS, ResourceTemplate() { Memory32Fixed(ReadWrite, DEFAULT_RCBA, 0x00004000) - Memory32Fixed(ReadWrite, DEFAULT_MCHBAR, 0x00004000) + Memory32Fixed(ReadWrite, CONFIG_DEFAULT_MCHBAR, 0x00004000) Memory32Fixed(ReadWrite, DEFAULT_DMIBAR, 0x00001000) Memory32Fixed(ReadWrite, DEFAULT_EPBAR, 0x00001000) Memory32Fixed(ReadWrite, CONFIG_MMCONF_BASE_ADDRESS, 0x04000000) diff --git a/src/northbridge/intel/gm45/early_init.c b/src/northbridge/intel/gm45/early_init.c index 1be3518..25daf38 100644 --- a/src/northbridge/intel/gm45/early_init.c +++ b/src/northbridge/intel/gm45/early_init.c @@ -9,7 +9,7 @@ const pci_devfn_t d0f0 = PCI_DEV(0, 0, 0);
/* Setup MCHBAR. */ - pci_write_config32(d0f0, D0F0_MCHBAR_LO, (uintptr_t)DEFAULT_MCHBAR | 1); + pci_write_config32(d0f0, D0F0_MCHBAR_LO, (uintptr_t)CONFIG_DEFAULT_MCHBAR | 1);
/* Setup DMIBAR. */ pci_write_config32(d0f0, D0F0_DMIBAR_LO, (uintptr_t)DEFAULT_DMIBAR | 1); diff --git a/src/northbridge/intel/gm45/gm45.h b/src/northbridge/intel/gm45/gm45.h index dc993cf..fe5a265 100644 --- a/src/northbridge/intel/gm45/gm45.h +++ b/src/northbridge/intel/gm45/gm45.h @@ -171,10 +171,8 @@ (could be reduced to 10 bytes) */
#ifndef __ACPI__ -#define DEFAULT_MCHBAR ((u8 *)0xfed14000) #define DEFAULT_DMIBAR ((u8 *)0xfed18000) #else -#define DEFAULT_MCHBAR 0xfed14000 #define DEFAULT_DMIBAR 0xfed18000 #endif #define DEFAULT_EPBAR 0xfed19000 @@ -237,9 +235,9 @@ * MCHBAR */
-#define MCHBAR8(x) *((volatile u8 *)(DEFAULT_MCHBAR + x)) -#define MCHBAR16(x) *((volatile u16 *)(DEFAULT_MCHBAR + x)) -#define MCHBAR32(x) *((volatile u32 *)(DEFAULT_MCHBAR + x)) +#define MCHBAR8(x) *((volatile u8 *)(CONFIG_DEFAULT_MCHBAR + x)) +#define MCHBAR16(x) *((volatile u16 *)(CONFIG_DEFAULT_MCHBAR + x)) +#define MCHBAR32(x) *((volatile u32 *)(CONFIG_DEFAULT_MCHBAR + x))
#define HPLLVCO_MCHBAR 0x0c0f
diff --git a/src/northbridge/intel/gm45/pcie.c b/src/northbridge/intel/gm45/pcie.c index 5a4999e..ffb52c8 100644 --- a/src/northbridge/intel/gm45/pcie.c +++ b/src/northbridge/intel/gm45/pcie.c @@ -268,7 +268,7 @@ /* Link2: component ID 1 (MCH), link valid */ DMIBAR32(DMILE2D) = (DMIBAR32(DMILE2D) & 0xff000000) | (1 << 16) | (1 << 0); - DMIBAR32(DMILE2A) = (uintptr_t)DEFAULT_MCHBAR; + DMIBAR32(DMILE2A) = (uintptr_t)CONFIG_DEFAULT_MCHBAR; }
void gm45_late_init(const stepping_t stepping)
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45615 )
Change subject: nb/intel/gm45: Move DEFAULT_MCHBAR to Kconfig ......................................................................
Patch Set 1:
(3 comments)
https://review.coreboot.org/c/coreboot/+/45615/1/src/northbridge/intel/gm45/... File src/northbridge/intel/gm45/gm45.h:
https://review.coreboot.org/c/coreboot/+/45615/1/src/northbridge/intel/gm45/... PS1, Line 238: #define MCHBAR8(x) *((volatile u8 *)(CONFIG_DEFAULT_MCHBAR + x)) Macros with complex values should be enclosed in parentheses
https://review.coreboot.org/c/coreboot/+/45615/1/src/northbridge/intel/gm45/... PS1, Line 239: #define MCHBAR16(x) *((volatile u16 *)(CONFIG_DEFAULT_MCHBAR + x)) Macros with complex values should be enclosed in parentheses
https://review.coreboot.org/c/coreboot/+/45615/1/src/northbridge/intel/gm45/... PS1, Line 240: #define MCHBAR32(x) *((volatile u32 *)(CONFIG_DEFAULT_MCHBAR + x)) Macros with complex values should be enclosed in parentheses
Hello build bot (Jenkins), Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45615
to look at the new patch set (#2).
Change subject: nb/intel/gm45: Move DEFAULT_MCHBAR to Kconfig ......................................................................
nb/intel/gm45: Move DEFAULT_MCHBAR to Kconfig
Change-Id: I5544d398c43ab9f0f85db69b2a9d9075d5598ec2 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/gm45/Kconfig M src/northbridge/intel/gm45/acpi/gm45.asl M src/northbridge/intel/gm45/early_init.c M src/northbridge/intel/gm45/gm45.h M src/northbridge/intel/gm45/pcie.c 5 files changed, 10 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/45615/2
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45615 )
Change subject: nb/intel/gm45: Move DEFAULT_MCHBAR to Kconfig ......................................................................
Patch Set 2:
(3 comments)
https://review.coreboot.org/c/coreboot/+/45615/2/src/northbridge/intel/gm45/... File src/northbridge/intel/gm45/gm45.h:
https://review.coreboot.org/c/coreboot/+/45615/2/src/northbridge/intel/gm45/... PS2, Line 234: #define MCHBAR8(x) *((volatile u8 *)(CONFIG_DEFAULT_MCHBAR + x)) Macros with complex values should be enclosed in parentheses
https://review.coreboot.org/c/coreboot/+/45615/2/src/northbridge/intel/gm45/... PS2, Line 235: #define MCHBAR16(x) *((volatile u16 *)(CONFIG_DEFAULT_MCHBAR + x)) Macros with complex values should be enclosed in parentheses
https://review.coreboot.org/c/coreboot/+/45615/2/src/northbridge/intel/gm45/... PS2, Line 236: #define MCHBAR32(x) *((volatile u32 *)(CONFIG_DEFAULT_MCHBAR + x)) Macros with complex values should be enclosed in parentheses
Hello build bot (Jenkins), Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45615
to look at the new patch set (#3).
Change subject: nb/intel/gm45: Move DEFAULT_MCHBAR to Kconfig ......................................................................
nb/intel/gm45: Move DEFAULT_MCHBAR to Kconfig
Change-Id: I5544d398c43ab9f0f85db69b2a9d9075d5598ec2 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/gm45/Kconfig M src/northbridge/intel/gm45/gm45.h 2 files changed, 5 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/45615/3
Hello build bot (Jenkins), Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45615
to look at the new patch set (#4).
Change subject: nb/intel/gm45: Move DEFAULT_BARs to Kconfig ......................................................................
nb/intel/gm45: Move DEFAULT_BARs to Kconfig
Change-Id: I5544d398c43ab9f0f85db69b2a9d9075d5598ec2 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/gm45/Kconfig M src/northbridge/intel/gm45/gm45.h 2 files changed, 14 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/45615/4
Hello build bot (Jenkins), Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45615
to look at the new patch set (#6).
Change subject: nb/intel/gm45: Move DEFAULT_BARs to Kconfig ......................................................................
nb/intel/gm45: Move DEFAULT_BARs to Kconfig
Change-Id: I5544d398c43ab9f0f85db69b2a9d9075d5598ec2 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/gm45/Kconfig M src/northbridge/intel/gm45/gm45.h 2 files changed, 13 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/45615/6
Hello build bot (Jenkins), Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45615
to look at the new patch set (#7).
Change subject: nb/intel/gm45: Move DEFAULT_BARs to Kconfig ......................................................................
nb/intel/gm45: Move DEFAULT_BARs to Kconfig
Change-Id: I5544d398c43ab9f0f85db69b2a9d9075d5598ec2 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/gm45/Kconfig M src/northbridge/intel/gm45/gm45.h 2 files changed, 13 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/45615/7
Hello build bot (Jenkins), Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45615
to look at the new patch set (#8).
Change subject: nb/intel/gm45: Move DEFAULT_BARs to Kconfig ......................................................................
nb/intel/gm45: Move DEFAULT_BARs to Kconfig
Change-Id: I5544d398c43ab9f0f85db69b2a9d9075d5598ec2 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/gm45/Kconfig M src/northbridge/intel/gm45/gm45.h 2 files changed, 13 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/45615/8
HAOUAS Elyes has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/45615 )
Change subject: nb/intel/gm45: Move DEFAULT_BARs to Kconfig ......................................................................
Abandoned
see 45613
-
build bot (Jenkins) (Code Review) -
HAOUAS Elyes (Code Review)