Patch set updated for coreboot: 41489c3 Add a device/dram function to read in a users SPD

[Dave Frodin]

Dave Frodin ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4533

-gerrit

commit 41489c34ed062af8f5f5087870ac8d49e35de843
Author: Dave Frodin 
Date:   Sat Dec 14 11:21:26 2013 -0700

Add a device/dram function to read in a users SPD

This allows mainboards with solder-down memory and without
    a solder-down SPD EEPROM to have the SPD values set by
    a mainboard include file.

Change-Id: I3fb351f4b84cf290e3f4374bcee8a038bccf7eed
    Signed-off-by: Dave Frodin 
---
 src/device/Makefile.inc        |  1 +
 src/device/dram/ddr3.c         | 28 ++++++++++++++++++++++++++++
 src/include/device/dram/ddr3.h | 11 +++++++++++
 3 files changed, 40 insertions(+)

diff --git a/src/device/Makefile.inc b/src/device/Makefile.inc
index 1dbb510..07ea4d0 100644
--- a/src/device/Makefile.inc
+++ b/src/device/Makefile.inc
@@ -14,6 +14,7 @@ ramstage-$(CONFIG_PCI) += pci_ops.c
 ramstage-y += smbus_ops.c

romstage-y+= device_romstage.c
+romstage-$(CONFIG_USER_DEFINED_SPD) += dram/ddr3.c

subdirs-y += oprom

diff --git a/src/device/dram/ddr3.c b/src/device/dram/ddr3.c
index 9b4f490..25c8864 100644
--- a/src/device/dram/ddr3.c
+++ b/src/device/dram/ddr3.c
@@ -609,3 +609,31 @@ mrs_cmd_t ddr3_mrs_mirror_pins(mrs_cmd_t cmd)
    cmd |= (downshift >> 1) | (upshift << 1);
    return cmd;
 }
+
+/**
+ * \brief Fill SPD array with user data and calculate the CRC.
+ */
+#if IS_ENABLED(CONFIG_USER_DEFINED_SPD)
+int fill_users_spd(unsigned char *spd_ptr)
+{
+	extern const u8 user_ddr3_spd[SPD_SIZE];
+	u16 index, crc;
+
+	for (index = 0; index < SPD_SIZE; index++)
+		spd_ptr[index] = user_ddr3_spd[index];
+
+	/* If CRC bytes are zeroes, calculate and store the CRC of the data */
+	if ((spd_ptr[SPD_CRC_LO] == 0) && (spd_ptr[SPD_CRC_HI] == 0)) {
+		crc = spd_ddr3_calc_crc(spd_ptr, SPD_CRC_SIZE);
+		spd_ptr[SPD_CRC_LO] = (unsigned char)(crc & 0xff);
+		spd_ptr[SPD_CRC_HI] = (unsigned char)(crc >> 8);
+	}
+	printk(BIOS_SPEW, "\nDisplay the SPD");
+	for (index = 0; index < SPD_SIZE; index++) {
+		if((index % 16) == 0x00) printk(BIOS_SPEW, "\n%02x:  ",index);
+		printk(BIOS_SPEW, "%02x ", spd_ptr[index]);
+	}
+	printk(BIOS_SPEW, "\n");
+	return 0;
+}
+#endif
diff --git a/src/include/device/dram/ddr3.h b/src/include/device/dram/ddr3.h
index b19c51c..3266345 100644
--- a/src/include/device/dram/ddr3.h
+++ b/src/include/device/dram/ddr3.h
@@ -47,6 +47,16 @@
 /** @} */

/**
+ * \brief Convenience definition for SPD related values
+ * @{
+ */
+#define SPD_SIZE        256
+#define SPD_CRC_SIZE    128
+#define SPD_CRC_LO      126
+#define SPD_CRC_HI      127
+/** @} */
+
+/**
  * \brief Convenience macro for enabling printk with CONFIG_DEBUG_RAM_SETUP
  *
  * Use this macro instead of printk(); for verbose RAM initialization messages.
@@ -174,6 +184,7 @@ u16 spd_ddr3_calc_crc(u8 *spd, int len);
 int spd_decode_ddr3(dimm_attr * dimm, spd_raw_data spd_data);
 int dimm_is_registered(enum spd_dimm_type type);
 void dram_print_spd_ddr3(const dimm_attr * dimm);
+int fill_users_spd(unsigned char *spd_ptr);

/**
  * \brief Read double word from specified address