[S] Change in coreboot[master]: src/include/smbios: Add definition for smbios type 4 and type 9

[Shuming Chu (Shuming) (Code Review)]

Attention is currently required from: Tim Chu.

Hello Tim Chu,

I'd like you to do a code review.
Please visit

https://review.coreboot.org/c/coreboot/+/68902

to review the following change.

Change subject: src/include/smbios: Add definition for smbios type 4 and type 9
......................................................................

src/include/smbios: Add definition for smbios type 4 and type 9

Add definition for smbios type 4 and type 9

Signed-off-by: Tim Chu 
Change-Id: I559995b0204f8e5bdeef2c0f8b394f9011d72240
---
M src/include/smbios.h
1 file changed, 17 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/68902/1

diff --git a/src/include/smbios.h b/src/include/smbios.h
index 3611eb6..696af6e 100644
--- a/src/include/smbios.h
+++ b/src/include/smbios.h
@@ -484,6 +484,10 @@

#define SMBIOS_PROCESSOR_STATUS_POPULATED		(1 << 6)
 #define SMBIOS_PROCESSOR_STATUS_CPU_ENABLED		(1 << 0)
+#define SMBIOS_PROCESSOR_FAMILY_XEON			0xb3
+#define PROCESSOR_64BIT_CAPABLE				BIT(2)
+#define PROCESSOR_MULTI_CORE				BIT(3)
+#define PROCESSOR_POWER_PERFORMANCE_CONTROL		BIT(7)

/* defines for supported_sram_type/current_sram_type */

@@ -721,6 +725,7 @@
    SlotTypePciExpressMini52pinWithBSKO = 0x21,
    SlotTypePciExpressMini52pinWithoutBSKO = 0x22,
    SlotTypePciExpressMini76pin = 0x23,
+	SlotTypePciExpressOCPNIC30SFF = 0x26,
    SlotTypePC98C20 = 0xA0,
    SlotTypePC98C24 = 0xA1,
    SlotTypePC98E = 0xA2,