[XS] Change in coreboot[main]: mb/topton/adl: Enable TPM

[Alicja Michalska (Code Review)]

Alicja Michalska has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85611?usp=email )

Change subject: mb/topton/adl: Enable TPM
......................................................................

mb/topton/adl: Enable TPM

Enable TPM2 (Intel fTPM/PTT).

Change-Id: If1a52cacf2eeef68efdd98c48d5802712305f354
Signed-off-by: Alicja Michalska 
---
M src/mainboard/topton/adl/Kconfig
M src/mainboard/topton/adl/devicetree.cb
2 files changed, 5 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/85611/1

diff --git a/src/mainboard/topton/adl/Kconfig b/src/mainboard/topton/adl/Kconfig
index 94cd222..df8a513 100644
--- a/src/mainboard/topton/adl/Kconfig
+++ b/src/mainboard/topton/adl/Kconfig
@@ -13,6 +13,8 @@
    select SOC_INTEL_ALDERLAKE_PCH_N
    select INTEL_GMA_HAVE_VBT
    select SOC_INTEL_COMMON_BLOCK_HDA_VERB
+	select HAVE_INTEL_PTT
+	select CRB_TPM

config MAINBOARD_DIR
    default "topton/adl"
diff --git a/src/mainboard/topton/adl/devicetree.cb b/src/mainboard/topton/adl/devicetree.cb
index 216589d..da53c73 100644
--- a/src/mainboard/topton/adl/devicetree.cb
+++ b/src/mainboard/topton/adl/devicetree.cb
@@ -121,5 +121,8 @@
    		register "pch_hda_idisp_link_frequency"		= "HDA_LINKFREQ_96MHZ"
    		register "pch_hda_idisp_link_tmode"		= "HDA_TMODE_8T"
    	end
+		chip drivers/crb
+			device mmio 0xfed40000 on end
+		end
    end
 end