Attention is currently required from: Hung-Te Lin, Paul Menzel, Yidi Lin, Yu-Ping Wu.
Jarried Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85613?usp=email )
Change subject: soc/mediatek/mt8196: Add pwrsel driver ......................................................................
Patch Set 3:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/85613/comment/996deb66_c1f5deaa?usp... : PS1, Line 11:
What values (profiles?) can be written by the firmware?
Sorry, I don't quite understand what you mean. This patch is just to initialize the PWRSEL hardware. Is it related to how mcupm operates? Thank you.
https://review.coreboot.org/c/coreboot/+/85613/comment/5f4a2650_523f2330?usp... : PS1, Line 14: PWR_SEL = 0x0
Aren’t two log messages added in the code?
please check 85620
File src/soc/mediatek/mt8196/mtk_pwrsel.c:
https://review.coreboot.org/c/coreboot/+/85613/comment/667a48a4_00941632?usp... : PS1, Line 22: printk(BIOS_INFO, "PWR_SEL = %#x\n",
It’d be great to have a comment documenting the possible values.
Done
https://review.coreboot.org/c/coreboot/+/85613/comment/cf2ba30d_b0750fe0?usp... : PS1, Line 22: printk(BIOS_INFO, "PWR_SEL = %#x\n", : read32p(MCUSYS_BASE + OFFSET_PWRSEL)); : printk(BIOS_INFO, "PWRSEL_CONFIG = %#x\n", : read32p(MFG_VCORE_AO_RPC_PWRSEL_CONFIG));
For an info level messages it’d be great to make this message user readable/understandable.
Done