Attention is currently required from: Furquan Shaikh, Zhuohao Lee, Aaron Durbin, Karthik Ramasubramanian. Hello build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Zhuohao Lee, Aaron Durbin, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/56622
to look at the new patch set (#5).
Change subject: mb/google/brya/variants/brya0: set power limits for thermal ......................................................................
mb/google/brya/variants/brya0: set power limits for thermal
Set power limits for brya0 variant board based on CPU SKUs which is detectable at runtime.
BUG=b:194745919 BRANCH=None TEST=Build FW and test on brya0 variant board with below messages, On brya (282): Overriding DPTF power limits PL1 (3000, 15000) PL2 (39000, 39000) On brya (482): Overriding DPTF power limits PL1 (4000, 28000) PL2 (43000, 43000)
Change-Id: I4c07319af756b10e5d22f320e97ff956fb4a14c6 Signed-off-by: Sumeet Pawnikar sumeet.r.pawnikar@intel.com --- M src/mainboard/google/brya/variants/brya0/Makefile.inc A src/mainboard/google/brya/variants/brya0/ramstage.c 2 files changed, 24 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/56622/5