the following patch was just integrated into master: commit cf544ac1f9a62cc58e3911c23a0b905950a0ff2f Author: Duncan Laurie dlaurie@chromium.org Date: Wed Jan 14 12:18:46 2015 -0800
broadwell: Remove XHCI workarounds on WPT
The workarounds in ACPI methods for D0/D3 transition that are used on haswell/LPT do not all apply to broadwell/WPT.
BUG=chrome-os-partner:28234 BRANCH=broadwell TEST=build and boot on samus, test USB functionality and wake and ensure the device still does into D3 state
Change-Id: Ic3a75f5bf50e826ade7d942b48cfebb75cf976e6 Signed-off-by: Stefan Reinauer reinauer@chromium.org Original-Commit-Id: 1b54d105957ee80ca34048c42fb8f241731281cf Original-Change-Id: I877afd51fc6c9b7906e923b893fc31bdf2cd1090 Original-Signed-off-by: Duncan Laurie dlaurie@chromium.org Original-Reviewed-on: https://chromium-review.googlesource.com/240850 Original-Reviewed-by: Shawn N shawnn@chromium.org Reviewed-on: http://review.coreboot.org/9488 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi pgeorgi@google.com
See http://review.coreboot.org/9488 for details.
-gerrit