Change in coreboot[master]: soc/mediatek: PCI: Assert PERST# at bootblock stage

[Hung-Te Lin (Code Review)]

Attention is currently required from: Shelley Chen, Paul Menzel, Angel Pons, Yu-Ping Wu, Jianjun Wang.
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62359 )

Change subject: soc/mediatek: PCI: Assert PERST# at bootblock stage
......................................................................

Patch Set 10:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/62359/comment/9b129a12_417ae9b9 
PS9, Line 14: 100ms
> > Something to keep in mind is that it only works as expected if `COLLECT_TIMESTAMPS` is enabled, but it's only `default y if ARCH_X86`.
>
> COLLECT_TIMESTAMPS is enabled for ChromeOS (src/vendorcode/google/chromeos/Kconfig).

The code in mt8195/cherry should still work even if not built for chromeos. I wonder if we have some common approach for sharing data across stages?