Change in coreboot[master]: mb/google/volteer: Update TCSS D3Hot and D3Cold configuration
John Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44004 )
Change subject: mb/google/volteer: Update TCSS D3Hot and D3Cold configuration ......................................................................
mb/google/volteer: Update TCSS D3Hot and D3Cold configuration
It is expected both of TCSS D3Hot and D3Cold are enabled by default.
BUG=None TEST=Verified both of TCSS D3Hot and D3Cold configuration on Volteer.
Signed-off-by: John Zhao john.zhao@intel.com Change-Id: I9a8b838dcb449ca78d15b18543d97d84b59417ac --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 0 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/44004/1
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index 0e8ad3e..53bbe5a 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -170,10 +170,6 @@ register "IomTypeCPortPadCfg[6]" = "0x09000000" register "IomTypeCPortPadCfg[7]" = "0x09000000"
- # D3Hot and D3Cold for TCSS - register "TcssD3HotEnable" = "1" - register "TcssD3ColdEnable" = "0" - # DP port register "DdiPortAConfig" = "1" # eDP register "DdiPortBConfig" = "0"
Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44004 )
Change subject: mb/google/volteer: Update TCSS D3Hot and D3Cold configuration ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44004/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44004/1//COMMIT_MSG@10 PS1, Line 10: since we still have ES2 and QS variants, it would be good to mention this is set to the default value appropriate for the SoC stepping.
Hello build bot (Jenkins), Wonkyu Kim, Caveh Jalali, Shreesh Chhabbi, Tim Wawrzynczak, Shamile Khan, Angel Pons, Divya S Sasidharan,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44004
to look at the new patch set (#2).
Change subject: mb/google/volteer: Update TCSS D3Hot and D3Cold configuration ......................................................................
mb/google/volteer: Update TCSS D3Hot and D3Cold configuration
It is expected TCSS D3Hot is enabled. D3Cold configuration is through SoC stepping determination. D3Cold is disabled on pre-QS platform and enabled on QS platform.
BUG=None TEST=Verified both of TCSS D3Hot and D3Cold configuration on Volteer.
Signed-off-by: John Zhao john.zhao@intel.com Change-Id: I9a8b838dcb449ca78d15b18543d97d84b59417ac --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 0 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/44004/2
John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44004 )
Change subject: mb/google/volteer: Update TCSS D3Hot and D3Cold configuration ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44004/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44004/1//COMMIT_MSG@10 PS1, Line 10:
since we still have ES2 and QS variants, it would be […]
Done
Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44004 )
Change subject: mb/google/volteer: Update TCSS D3Hot and D3Cold configuration ......................................................................
Patch Set 2: Code-Review+2
Divya S Sasidharan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44004 )
Change subject: mb/google/volteer: Update TCSS D3Hot and D3Cold configuration ......................................................................
Patch Set 2: Code-Review+1
Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44004 )
Change subject: mb/google/volteer: Update TCSS D3Hot and D3Cold configuration ......................................................................
Patch Set 2: Code-Review+2
Nick Vaccaro has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44004 )
Change subject: mb/google/volteer: Update TCSS D3Hot and D3Cold configuration ......................................................................
mb/google/volteer: Update TCSS D3Hot and D3Cold configuration
It is expected TCSS D3Hot is enabled. D3Cold configuration is through SoC stepping determination. D3Cold is disabled on pre-QS platform and enabled on QS platform.
BUG=None TEST=Verified both of TCSS D3Hot and D3Cold configuration on Volteer.
Signed-off-by: John Zhao john.zhao@intel.com Change-Id: I9a8b838dcb449ca78d15b18543d97d84b59417ac Reviewed-on: https://review.coreboot.org/c/coreboot/+/44004 Reviewed-by: Caveh Jalali caveh@chromium.org Reviewed-by: Divya S Sasidharan divya.s.sasidharan@intel.com Reviewed-by: Wonkyu Kim wonkyu.kim@intel.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb 1 file changed, 0 insertions(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified Divya S Sasidharan: Looks good to me, but someone else must approve Caveh Jalali: Looks good to me, approved Wonkyu Kim: Looks good to me, approved
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index 0e8ad3e..53bbe5a 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -170,10 +170,6 @@ register "IomTypeCPortPadCfg[6]" = "0x09000000" register "IomTypeCPortPadCfg[7]" = "0x09000000"
- # D3Hot and D3Cold for TCSS - register "TcssD3HotEnable" = "1" - register "TcssD3ColdEnable" = "0" - # DP port register "DdiPortAConfig" = "1" # eDP register "DdiPortBConfig" = "0"
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Caveh Jalali (Code Review) -
Divya S Sasidharan (Code Review)
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John Zhao (Code Review)
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Nick Vaccaro (Code Review)
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Wonkyu Kim (Code Review)