Change subject: soc/intel/alderlake/bootblock/pch.c: Enable SIO 4e/4f ports decoding
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I6df158f54a48fb9f3173a4b209316c8116aa265a
Gerrit-Change-Number: 63461
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Gerrit-Comment-Date: Thu, 07 Apr 2022 16:54:25 +0000
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