[S] Change in coreboot[master]: soc/intel/alderlake: Drop duplicate macro `PCH_PWRM_BASE_SIZE`

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/70180 )

Change subject: soc/intel/alderlake: Drop duplicate macro `PCH_PWRM_BASE_SIZE`
......................................................................

soc/intel/alderlake: Drop duplicate macro `PCH_PWRM_BASE_SIZE`

This patch ensures dropping of the duplicate macro introduced with
'commit 9e4488ab06fd9c4 ("soc/intel/{adl,cmn}: Add/Remove LTR
disqualification for UFS")'

`PCH_PWRM_BASE_SIZE` macro represents the size of the PMC MMIO range
which can be used as is even in ufs.asl file.

BUG=b:252975357
TEST=Build and boot nirwen and see no issues in PLT runs.

Signed-off-by: Subrata Banik 
Change-Id: Ic967c609e1330eca1b9e1143e7efd78db011f317
---
M src/soc/intel/alderlake/include/soc/ufs.h
1 file changed, 20 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/70180/1

diff --git a/src/soc/intel/alderlake/include/soc/ufs.h b/src/soc/intel/alderlake/include/soc/ufs.h
index e3a98f2..a7efc8a 100644
--- a/src/soc/intel/alderlake/include/soc/ufs.h
+++ b/src/soc/intel/alderlake/include/soc/ufs.h
@@ -24,5 +24,4 @@
 #define R_SCS_PCR_1078		0x1078

#define R_PMC_PWRM_LTR_IGN	0x1b0c
-#define PCH_PWRM_BASE_SIZE	0x1e30
 #endif