[S] Change in coreboot[main]: soc/intel/common/block/cpu: Add Kconfig for effective way size for NEM+
Attention is currently required from: Ashish Kumar Mishra, Paul Menzel, Sowmya Aralguppe, Subrata Banik, Wonkyu Kim.
Jérémy Compostella has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/83946?usp=email )
Change subject: soc/intel/common/block/cpu: Add Kconfig for effective way size for NEM+ ......................................................................
Patch Set 13:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83946/comment/bd8bfac0_ab932e31?usp... : PS13, Line 25: 0x400000 (4 MB).
This is not a requirement.
https://review.coreboot.org/c/coreboot/+/83946/comment/dd03c4f3_53dd98cd?usp... : PS13, Line 23: The issue addressed by this commit can be observed with the following : experiment: using a 18 MB LLC SKU, set `DCACHE_RAM_SIZE` to : 0x400000 (4 MB).
But my question is where is the doc to refer to understand the formula to calculate the eff_way_ […]
Sorry for the delay but I have higher priority tasks these days but I glad I finally get to reply to you.
1. This is not how I interpret it and the experiment I performed demonstrate that my understanding is correct, If I only map 3 ways for 4 MB on a 18 MB LLC SKU I get a page fault when I try to access between 3MB and 4 MB. My understanding is also aligned with the discussion I had internally.
2. That is correct, the LLC size which can be use for NEM purposes in this example is limited 12MB instead of 18 MB
3. Actually, the code I am adding is dealing with `%ecx` which is the way size, not the LLC size. So the code is correct.
4. The bank number cannot be read since Meteor Lake and therefore the HAS recommendation is to use `previous_power_of_two( (Paritions + 1) * (Line Size + 1) * (Sets + 1))` which is what is implemented in this CL.
https://review.coreboot.org/c/coreboot/+/83946/comment/5f94c566_8e3f5fe8?usp... : PS13, Line 28: 3
if one way size if 1.5MB (0x180000) then technically 3 way is enough to cover the mapping for 4. […]
This is not how I interpret it and the experiment I performed demonstrate that my understanding is correct, If I only map 3 ways for 4 MB on a 18 MB LLC SKU I get a page fault when I try to access between 3MB and 4 MB. My understanding is also aligned with the discussion I had internally.
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Jérémy Compostella (Code Review)