Maxim Polyakov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35493 )
Change subject: pci_ids: add missing Intel Skylake iGPU PCI IDs ......................................................................
pci_ids: add missing Intel Skylake iGPU PCI IDs
- fixes PCI ID for GT4 HALO (Iris Pro Graphics P580); - adds missing Intel HD/Iris iGPU PCI IDs for Skylake processors; - updates the platform report for these devices.
These changes are in accordance with the documentation: [*] page 11-12, Intel(R) Open Source HD Graphics, Intel Iris(TM) Graphics, and Intel Iris(TM) Pro Graphics, Programmer's Reference Manual. Volume 4: Configurations. May 2016, Revision 1.0 Doc Ref # IHD-OS-SKL-Vol 4-05.16
Change-Id: I0ba6e58ec3916dceea00519ac5a51503573e8935 Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com --- M src/include/device/pci_ids.h M src/soc/intel/common/block/graphics/graphics.c M src/soc/intel/skylake/bootblock/report_platform.c 3 files changed, 30 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/35493/1
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 07589c8..c07d052 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3097,13 +3097,20 @@ #define PCI_DEVICE_ID_INTEL_CMP_HWSEQ_SPI 0x02a4
/* Intel IGD device Ids */ +#define PCI_DEVICE_ID_INTEL_SKL_GT1F_DT2 0x1902 #define PCI_DEVICE_ID_INTEL_SKL_GT1_SULTM 0x1906 +#define PCI_DEVICE_ID_INTEL_SKL_GT1F_SHALM 0x190B #define PCI_DEVICE_ID_INTEL_SKL_GT2_DT2P1 0x1912 -#define PCI_DEVICE_ID_INTEL_SKL_GT2_SULXM 0x191E #define PCI_DEVICE_ID_INTEL_SKL_GT2_SULTM 0x1916 #define PCI_DEVICE_ID_INTEL_SKL_GT2_SHALM 0x191B #define PCI_DEVICE_ID_INTEL_SKL_GT2_SWKSM 0x191D -#define PCI_DEVICE_ID_INTEL_SKL_GT4_SHALM 0x193D +#define PCI_DEVICE_ID_INTEL_SKL_GT2_SULXM 0x191E +#define PCI_DEVICE_ID_INTEL_SKL_GT3_SULTM 0x1923 +#define PCI_DEVICE_ID_INTEL_SKL_GT3E_SULTM_1 0x1926 +#define PCI_DEVICE_ID_INTEL_SKL_GT3E_SULTM_2 0x1927 +#define PCI_DEVICE_ID_INTEL_SKL_GT3FE_SRVM 0x192D +#define PCI_DEVICE_ID_INTEL_SKL_GT4_SHALM 0x193B +#define PCI_DEVICE_ID_INTEL_SKL_GT4E_SWSTM 0x193D #define PCI_DEVICE_ID_INTEL_KBL_GT1_SULTM 0x5906 #define PCI_DEVICE_ID_INTEL_KBL_GT2_DT2P2 0x5912 #define PCI_DEVICE_ID_INTEL_KBL_GT2_SULXM 0x591E diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c index 7aece76..e236803 100644 --- a/src/soc/intel/common/block/graphics/graphics.c +++ b/src/soc/intel/common/block/graphics/graphics.c @@ -142,13 +142,19 @@ PCI_DEVICE_ID_INTEL_KBL_GT2_SHALM, PCI_DEVICE_ID_INTEL_KBL_GT2_DT2P2, PCI_DEVICE_ID_INTEL_AML_GT2_ULX, + PCI_DEVICE_ID_INTEL_SKL_GT1F_DT2, PCI_DEVICE_ID_INTEL_SKL_GT1_SULTM, PCI_DEVICE_ID_INTEL_SKL_GT2_DT2P1, PCI_DEVICE_ID_INTEL_SKL_GT2_SULXM, PCI_DEVICE_ID_INTEL_SKL_GT2_SULTM, PCI_DEVICE_ID_INTEL_SKL_GT2_SHALM, PCI_DEVICE_ID_INTEL_SKL_GT2_SWKSM, + PCI_DEVICE_ID_INTEL_SKL_GT3_SULTM, + PCI_DEVICE_ID_INTEL_SKL_GT3E_SULTM_1, + PCI_DEVICE_ID_INTEL_SKL_GT3E_SULTM_2, + PCI_DEVICE_ID_INTEL_SKL_GT3FE_SRVM, PCI_DEVICE_ID_INTEL_SKL_GT4_SHALM, + PCI_DEVICE_ID_INTEL_SKL_GT4E_SWSTM, PCI_DEVICE_ID_INTEL_CFL_H_GT2, PCI_DEVICE_ID_INTEL_CFL_H_XEON_GT2, PCI_DEVICE_ID_INTEL_CFL_S_GT2_1, diff --git a/src/soc/intel/skylake/bootblock/report_platform.c b/src/soc/intel/skylake/bootblock/report_platform.c index 89dd154..124bb82 100644 --- a/src/soc/intel/skylake/bootblock/report_platform.c +++ b/src/soc/intel/skylake/bootblock/report_platform.c @@ -119,13 +119,21 @@ u16 igdid; const char *name; } igd_table[] = { - { PCI_DEVICE_ID_INTEL_SKL_GT1_SULTM, "Skylake ULT GT1"}, - { PCI_DEVICE_ID_INTEL_SKL_GT2_DT2P1, "Skylake DT GT2" }, - { PCI_DEVICE_ID_INTEL_SKL_GT2_SULXM, "Skylake ULX GT2" }, - { PCI_DEVICE_ID_INTEL_SKL_GT2_SULTM, "Skylake ULT GT2" }, - { PCI_DEVICE_ID_INTEL_SKL_GT2_SHALM, "Skylake HALO GT2" }, - { PCI_DEVICE_ID_INTEL_SKL_GT4_SHALM, "Skylake HALO GT4" }, - { PCI_DEVICE_ID_INTEL_KBL_GT1_SULTM, "Kabylake ULT GT1"}, + { PCI_DEVICE_ID_INTEL_SKL_GT1F_DT2, "Skylake DT GT1F (HD Graphics 510)" }, + { PCI_DEVICE_ID_INTEL_SKL_GT1_SULTM, "Skylake ULT GT1 (HD Graphics 510)" }, + { PCI_DEVICE_ID_INTEL_SKL_GT1F_SHALM, "Skylake HALO GT1F (HD Graphics 510)" }, + { PCI_DEVICE_ID_INTEL_SKL_GT2_DT2P1, "Skylake DT GT2 (HD Graphics 530)" }, + { PCI_DEVICE_ID_INTEL_SKL_GT2_SULTM, "Skylake ULT GT2 (HD Graphics 520)" }, + { PCI_DEVICE_ID_INTEL_SKL_GT2_SHALM, "Skylake HALO GT2 (HD Graphics 520/530)" }, + { PCI_DEVICE_ID_INTEL_SKL_GT2_SWKSM, "Skylake Mobile Xeon GT2 (HD Graphics P530)"}, + { PCI_DEVICE_ID_INTEL_SKL_GT2_SULXM, "Skylake ULX GT2 (HD Graphics 510/515)" }, + { PCI_DEVICE_ID_INTEL_SKL_GT3_SULTM, "Skylake ULT GT3 (HD Graphics 535)" }, + { PCI_DEVICE_ID_INTEL_SKL_GT3E_SULTM_1, "Skylake ULT (15W) GT3E (Iris Graphic 540)" }, + { PCI_DEVICE_ID_INTEL_SKL_GT3E_SULTM_2, "Skylake ULT (28W) GT3E (Iris Graphic 540)" }, + { PCI_DEVICE_ID_INTEL_SKL_GT3FE_SRVM, "Skylake Media Server GT3FE (Iris Graphics P555)" }, + { PCI_DEVICE_ID_INTEL_SKL_GT4_SHALM, "Skylake HALO GT4 (Iris Pro Graphics P580)" }, + { PCI_DEVICE_ID_INTEL_SKL_GT4E_SWSTM, "Skylake Workstation GT4E (Iris Pro Graphics P580)" }, + { PCI_DEVICE_ID_INTEL_KBL_GT1_SULTM, "Kabylake ULT GT1" }, { PCI_DEVICE_ID_INTEL_KBL_GT2_SULXM, "Kabylake ULX GT2" }, { PCI_DEVICE_ID_INTEL_KBL_GT2_SULTM, "Kabylake ULT GT2" }, { PCI_DEVICE_ID_INTEL_KBL_GT2_SULTMR, "Kabylake-R ULT GT2"},
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35493 )
Change subject: pci_ids: add missing Intel Skylake iGPU PCI IDs ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/c/coreboot/+/35493/1/src/soc/intel/skylake/bootb... File src/soc/intel/skylake/bootblock/report_platform.c:
https://review.coreboot.org/c/coreboot/+/35493/1/src/soc/intel/skylake/bootb... PS1, Line 133: { PCI_DEVICE_ID_INTEL_SKL_GT3FE_SRVM, "Skylake Media Server GT3FE (Iris Graphics P555)" }, line over 96 characters
https://review.coreboot.org/c/coreboot/+/35493/1/src/soc/intel/skylake/bootb... PS1, Line 135: { PCI_DEVICE_ID_INTEL_SKL_GT4E_SWSTM, "Skylake Workstation GT4E (Iris Pro Graphics P580)" }, line over 96 characters
Hello Patrick Rudolph, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35493
to look at the new patch set (#2).
Change subject: pci_ids: add missing Intel Skylake iGPU PCI IDs ......................................................................
pci_ids: add missing Intel Skylake iGPU PCI IDs
- fixes PCI ID for GT4 HALO (Iris Pro Graphics P580); - adds missing Intel HD/Iris iGPU PCI IDs for Skylake processors; - updates the platform report for these devices.
These changes are in accordance with the documentation: [*] page 11-12, Intel(R) Open Source HD Graphics, Intel Iris(TM) Graphics, and Intel Iris(TM) Pro Graphics, Programmer's Reference Manual. Volume 4: Configurations. May 2016, Revision 1.0 Doc Ref # IHD-OS-SKL-Vol 4-05.16
Change-Id: I0ba6e58ec3916dceea00519ac5a51503573e8935 Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com --- M src/include/device/pci_ids.h M src/soc/intel/common/block/graphics/graphics.c M src/soc/intel/skylake/bootblock/report_platform.c 3 files changed, 32 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/35493/2
Hello Patrick Rudolph, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35493
to look at the new patch set (#3).
Change subject: src/pci_ids: add missing Intel Skylake iGPU PCIIDs ......................................................................
src/pci_ids: add missing Intel Skylake iGPU PCIIDs
Adds missing Intel HD/Iris iGPU PCI IDs for Skylake processors and updates the platform report for these devices.
These changes are in accordance with the documentation: [*] page 11-12, Intel(R) Open Source HD Graphics, Intel Iris(TM) Graphics, and Intel Iris(TM) Pro Graphics, Programmer's Reference Manual. Volume 4: Configurations. May 2016, Revision 1.0 Doc Ref # IHD-OS-SKL-Vol 4-05.16
Change-Id: I0ba6e58ec3916dceea00519ac5a51503573e8935 Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com --- M src/include/device/pci_ids.h M src/soc/intel/common/block/graphics/graphics.c M src/soc/intel/skylake/bootblock/report_platform.c 3 files changed, 31 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/35493/3
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35493 )
Change subject: src/pci_ids: add missing Intel Skylake iGPU PCIIDs ......................................................................
Patch Set 3: Code-Review+1
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35493 )
Change subject: src/pci_ids: add missing Intel Skylake iGPU PCIIDs ......................................................................
Patch Set 3:
I don't think we need the additional name here. Keep it consistent with KBL.
Hello Patrick Rudolph, Paul Menzel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35493
to look at the new patch set (#4).
Change subject: src/pci_ids: add missing Intel Skylake iGPU PCIIDs ......................................................................
src/pci_ids: add missing Intel Skylake iGPU PCIIDs
Adds missing Intel HD/Iris iGPU PCI IDs for Skylake processors
These changes are in accordance with the documentation: [*] page 11-12, Intel(R) Open Source HD Graphics, Intel Iris(TM) Graphics, and Intel Iris(TM) Pro Graphics, Programmer's Reference Manual. Volume 4: Configurations. May 2016, Revision 1.0 Doc Ref # IHD-OS-SKL-Vol 4-05.16
Change-Id: I0ba6e58ec3916dceea00519ac5a51503573e8935 Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com --- M src/include/device/pci_ids.h M src/soc/intel/common/block/graphics/graphics.c M src/soc/intel/skylake/bootblock/report_platform.c 3 files changed, 24 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/35493/4
Maxim Polyakov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35493 )
Change subject: src/pci_ids: add missing Intel Skylake iGPU PCIIDs ......................................................................
Patch Set 4:
Thanks for the review
Patch Set 3:
I don't think we need the additional name here. Keep it consistent with KBL.
Done
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35493 )
Change subject: src/pci_ids: add missing Intel Skylake iGPU PCIIDs ......................................................................
Patch Set 5: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/35493 )
Change subject: src/pci_ids: add missing Intel Skylake iGPU PCIIDs ......................................................................
src/pci_ids: add missing Intel Skylake iGPU PCIIDs
Adds missing Intel HD/Iris iGPU PCI IDs for Skylake processors
These changes are in accordance with the documentation: [*] page 11-12, Intel(R) Open Source HD Graphics, Intel Iris(TM) Graphics, and Intel Iris(TM) Pro Graphics, Programmer's Reference Manual. Volume 4: Configurations. May 2016, Revision 1.0 Doc Ref # IHD-OS-SKL-Vol 4-05.16
Change-Id: I0ba6e58ec3916dceea00519ac5a51503573e8935 Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/35493 Reviewed-by: Patrick Rudolph siro@das-labor.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/include/device/pci_ids.h M src/soc/intel/common/block/graphics/graphics.c M src/soc/intel/skylake/bootblock/report_platform.c 3 files changed, 24 insertions(+), 3 deletions(-)
Approvals: build bot (Jenkins): Verified Patrick Rudolph: Looks good to me, approved
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index e6b8b18..84896f6 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3097,13 +3097,20 @@ #define PCI_DEVICE_ID_INTEL_CMP_HWSEQ_SPI 0x02a4
/* Intel IGD device Ids */ +#define PCI_DEVICE_ID_INTEL_SKL_GT1F_DT2 0x1902 #define PCI_DEVICE_ID_INTEL_SKL_GT1_SULTM 0x1906 +#define PCI_DEVICE_ID_INTEL_SKL_GT1F_SHALM 0x190B #define PCI_DEVICE_ID_INTEL_SKL_GT2_DT2P1 0x1912 -#define PCI_DEVICE_ID_INTEL_SKL_GT2_SULXM 0x191E #define PCI_DEVICE_ID_INTEL_SKL_GT2_SULTM 0x1916 #define PCI_DEVICE_ID_INTEL_SKL_GT2_SHALM 0x191B #define PCI_DEVICE_ID_INTEL_SKL_GT2_SWKSM 0x191D +#define PCI_DEVICE_ID_INTEL_SKL_GT2_SULXM 0x191E +#define PCI_DEVICE_ID_INTEL_SKL_GT3_SULTM 0x1923 +#define PCI_DEVICE_ID_INTEL_SKL_GT3E_SULTM_1 0x1926 +#define PCI_DEVICE_ID_INTEL_SKL_GT3E_SULTM_2 0x1927 +#define PCI_DEVICE_ID_INTEL_SKL_GT3FE_SSRVM 0x192D #define PCI_DEVICE_ID_INTEL_SKL_GT4_SHALM 0x193B +#define PCI_DEVICE_ID_INTEL_SKL_GT4E_SWSTM 0x193D #define PCI_DEVICE_ID_INTEL_KBL_GT1_SULTM 0x5906 #define PCI_DEVICE_ID_INTEL_KBL_GT2_DT2P2 0x5912 #define PCI_DEVICE_ID_INTEL_KBL_GT2_SULXM 0x591E diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c index 7aece76..c59fc53 100644 --- a/src/soc/intel/common/block/graphics/graphics.c +++ b/src/soc/intel/common/block/graphics/graphics.c @@ -142,13 +142,19 @@ PCI_DEVICE_ID_INTEL_KBL_GT2_SHALM, PCI_DEVICE_ID_INTEL_KBL_GT2_DT2P2, PCI_DEVICE_ID_INTEL_AML_GT2_ULX, + PCI_DEVICE_ID_INTEL_SKL_GT1F_DT2, PCI_DEVICE_ID_INTEL_SKL_GT1_SULTM, PCI_DEVICE_ID_INTEL_SKL_GT2_DT2P1, PCI_DEVICE_ID_INTEL_SKL_GT2_SULXM, PCI_DEVICE_ID_INTEL_SKL_GT2_SULTM, PCI_DEVICE_ID_INTEL_SKL_GT2_SHALM, PCI_DEVICE_ID_INTEL_SKL_GT2_SWKSM, + PCI_DEVICE_ID_INTEL_SKL_GT3_SULTM, + PCI_DEVICE_ID_INTEL_SKL_GT3E_SULTM_1, + PCI_DEVICE_ID_INTEL_SKL_GT3E_SULTM_2, + PCI_DEVICE_ID_INTEL_SKL_GT3FE_SSRVM, PCI_DEVICE_ID_INTEL_SKL_GT4_SHALM, + PCI_DEVICE_ID_INTEL_SKL_GT4E_SWSTM, PCI_DEVICE_ID_INTEL_CFL_H_GT2, PCI_DEVICE_ID_INTEL_CFL_H_XEON_GT2, PCI_DEVICE_ID_INTEL_CFL_S_GT2_1, diff --git a/src/soc/intel/skylake/bootblock/report_platform.c b/src/soc/intel/skylake/bootblock/report_platform.c index 89dd154..d94ea99 100644 --- a/src/soc/intel/skylake/bootblock/report_platform.c +++ b/src/soc/intel/skylake/bootblock/report_platform.c @@ -119,12 +119,20 @@ u16 igdid; const char *name; } igd_table[] = { - { PCI_DEVICE_ID_INTEL_SKL_GT1_SULTM, "Skylake ULT GT1"}, + { PCI_DEVICE_ID_INTEL_SKL_GT1F_DT2, "Skylake DT GT1F" }, + { PCI_DEVICE_ID_INTEL_SKL_GT1_SULTM, "Skylake ULT GT1" }, + { PCI_DEVICE_ID_INTEL_SKL_GT1F_SHALM, "Skylake HALO GT1F" }, { PCI_DEVICE_ID_INTEL_SKL_GT2_DT2P1, "Skylake DT GT2" }, - { PCI_DEVICE_ID_INTEL_SKL_GT2_SULXM, "Skylake ULX GT2" }, { PCI_DEVICE_ID_INTEL_SKL_GT2_SULTM, "Skylake ULT GT2" }, { PCI_DEVICE_ID_INTEL_SKL_GT2_SHALM, "Skylake HALO GT2" }, + { PCI_DEVICE_ID_INTEL_SKL_GT2_SWKSM, "Skylake Mobile Xeon GT2"}, + { PCI_DEVICE_ID_INTEL_SKL_GT2_SULXM, "Skylake ULX GT2" }, + { PCI_DEVICE_ID_INTEL_SKL_GT3_SULTM, "Skylake ULT GT3" }, + { PCI_DEVICE_ID_INTEL_SKL_GT3E_SULTM_1, "Skylake ULT (15W) GT3E" }, + { PCI_DEVICE_ID_INTEL_SKL_GT3E_SULTM_2, "Skylake ULT (28W) GT3E" }, + { PCI_DEVICE_ID_INTEL_SKL_GT3FE_SSRVM, "Skylake Media Server GT3FE" }, { PCI_DEVICE_ID_INTEL_SKL_GT4_SHALM, "Skylake HALO GT4" }, + { PCI_DEVICE_ID_INTEL_SKL_GT4E_SWSTM, "Skylake Workstation GT4E" }, { PCI_DEVICE_ID_INTEL_KBL_GT1_SULTM, "Kabylake ULT GT1"}, { PCI_DEVICE_ID_INTEL_KBL_GT2_SULXM, "Kabylake ULX GT2" }, { PCI_DEVICE_ID_INTEL_KBL_GT2_SULTM, "Kabylake ULT GT2" },
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build bot (Jenkins) (Code Review) -
Maxim Polyakov (Code Review)
-
Patrick Georgi (Code Review)
-
Patrick Rudolph (Code Review)
-
Paul Menzel (Code Review)