Change in coreboot[master]: mb/google/volteer: Set FORCE_PWR low at boot time

[John Zhao (Code Review)]

John Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48649 )

Change subject: mb/google/volteer: Set FORCE_PWR low at boot time
......................................................................

mb/google/volteer: Set FORCE_PWR low at boot time

While FORCE_PWR is set high, it prevents retimer from entering low power
state. S0ix failure occurs while USB4 Gatkex is connected on Port-0.
This change sets FORCE_PWR(GPP_H10) low. This FORCE_PWR GPIO will be
toggled by kernel through DSM method while updating retimer firmware.

BUG=b:174166586
TEST=Verifed s0ix cycles with USB4 Gatkex connected on Port-0.

Signed-off-by: John Zhao 
Change-Id: Ie4b442e1078379c522a94bfdc00cd99e6f9b8170
---
M src/mainboard/google/volteer/variants/baseboard/gpio.c
M src/mainboard/google/volteer/variants/terrador/gpio.c
M src/mainboard/google/volteer/variants/todor/gpio.c
M src/mainboard/google/volteer/variants/voema/gpio.c
4 files changed, 4 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/48649/1

diff --git a/src/mainboard/google/volteer/variants/baseboard/gpio.c b/src/mainboard/google/volteer/variants/baseboard/gpio.c
index 922d3d1..2030f31 100644
--- a/src/mainboard/google/volteer/variants/baseboard/gpio.c
+++ b/src/mainboard/google/volteer/variants/baseboard/gpio.c
@@ -308,7 +308,7 @@
    /* H9  : I2C4_SCL ==> NC */
    PAD_NC(GPP_H9, NONE),
    /* H10 : SRCCLKREQ4# ==> USB_C1_RT_FORCE_PWR */
-	PAD_CFG_GPO(GPP_H10, 1, DEEP),
+	PAD_CFG_GPO(GPP_H10, 0, DEEP),
    /* H11 : SRCCLKREQ5# ==> NC */
    PAD_NC(GPP_H11, NONE),
    /* H12 : M2_SKT2_CFG0 ==> NONE */
diff --git a/src/mainboard/google/volteer/variants/terrador/gpio.c b/src/mainboard/google/volteer/variants/terrador/gpio.c
index d5498d0..79722d8 100644
--- a/src/mainboard/google/volteer/variants/terrador/gpio.c
+++ b/src/mainboard/google/volteer/variants/terrador/gpio.c
@@ -139,7 +139,7 @@
    /* H3  : SX_EXIT_HOLDOFF# ==> SD_PERST_L */
    PAD_CFG_GPO(GPP_H3, 1, DEEP),
    /* H10 : SRCCLKREQ4# ==> USB_C_MIX_RT_FORCE_PWR */
-	PAD_CFG_GPO(GPP_H10, 1, DEEP),
+	PAD_CFG_GPO(GPP_H10, 0, DEEP),
    /* H13 : M2_SKT2_CFG1 # ==> SPKR_INT_L */
    PAD_CFG_GPI(GPP_H13, NONE, DEEP),
    /* H16 : DDPB_CTRLCLK ==> DDPB_HDMI_CTRLCLK */
diff --git a/src/mainboard/google/volteer/variants/todor/gpio.c b/src/mainboard/google/volteer/variants/todor/gpio.c
index 40d25a5..0391964 100644
--- a/src/mainboard/google/volteer/variants/todor/gpio.c
+++ b/src/mainboard/google/volteer/variants/todor/gpio.c
@@ -147,7 +147,7 @@
    /* H3  : SX_EXIT_HOLDOFF# ==> SD_PERST_L */
    PAD_CFG_GPO(GPP_H3, 1, DEEP),
    /* H10 : SRCCLKREQ4# ==> USB_C_MIX_RT_FORCE_PWR */
-	PAD_CFG_GPO(GPP_H10, 1, DEEP),
+	PAD_CFG_GPO(GPP_H10, 0, DEEP),
    /* H13 : M2_SKT2_CFG1 # ==> SPKR_INT_L */
    PAD_CFG_GPI(GPP_H13, NONE, DEEP),
    /* H16 : DDPB_CTRLCLK ==> DDPB_HDMI_CTRLCLK */
diff --git a/src/mainboard/google/volteer/variants/voema/gpio.c b/src/mainboard/google/volteer/variants/voema/gpio.c
index d905dae..5bf6fad 100644
--- a/src/mainboard/google/volteer/variants/voema/gpio.c
+++ b/src/mainboard/google/volteer/variants/voema/gpio.c
@@ -137,7 +137,7 @@
    /* H3  : SX_EXIT_HOLDOFF# ==> SD_PERST_L */
    PAD_CFG_GPO(GPP_H3, 1, DEEP),
    /* H10 : SRCCLKREQ4# ==> USB_C_MIX_RT_FORCE_PWR */
-	PAD_CFG_GPO(GPP_H10, 1, DEEP),
+	PAD_CFG_GPO(GPP_H10, 0, DEEP),
    /* H13 : M2_SKT2_CFG1 # ==> SPKR_INT_L */
    PAD_CFG_GPI(GPP_H13, NONE, DEEP),
    /* H16 : DDPB_CTRLCLK ==> DDPB_HDMI_CTRLCLK */

[Duncan Laurie (Code Review)]

Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48649 )

Change subject: mb/google/volteer: Set FORCE_PWR low at boot time
......................................................................

Patch Set 1: Code-Review+2

[Utkarsh H Patel (Code Review)]

Utkarsh H Patel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48649 )

Change subject: mb/google/volteer: Set FORCE_PWR low at boot time
......................................................................

Patch Set 1:

John, Please do not merge this until we have retimer init sequence fixed and Please also add Cq-Depend on this CL:2594438

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48649 )

Change subject: mb/google/volteer: Set FORCE_PWR low at boot time
......................................................................

Patch Set 1: Code-Review+2

[John Zhao (Code Review)]

John Zhao has uploaded a new patch set (#2) to the change originally created by John Zhao. ( https://review.coreboot.org/c/coreboot/+/48649 )

Change subject: mb/google/volteer: Set FORCE_PWR low at boot time
......................................................................

mb/google/volteer: Set FORCE_PWR low at boot time

While FORCE_PWR is set high, it prevents retimer from entering low power
state. S0ix failure occurs while USB4 Gatkex is connected on Port-0.
This change sets FORCE_PWR(GPP_H10) low. This FORCE_PWR GPIO will be
toggled by kernel through DSM method while updating retimer firmware.

BUG=b:174166586
CQ-DEPEND=CL:*2594438
TEST=Verifed s0ix cycles with USB4 Gatkex connected on Port-0.

Signed-off-by: John Zhao 
Change-Id: Ie4b442e1078379c522a94bfdc00cd99e6f9b8170
---
M src/mainboard/google/volteer/variants/baseboard/gpio.c
M src/mainboard/google/volteer/variants/terrador/gpio.c
M src/mainboard/google/volteer/variants/todor/gpio.c
M src/mainboard/google/volteer/variants/voema/gpio.c
4 files changed, 4 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/48649/2

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48649 )

Change subject: mb/google/volteer: Set FORCE_PWR low at boot time
......................................................................

Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/48649/2//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/48649/2//COMMIT_MSG@15 
PS2, Line 15: CQ-DEPEND=CL:*2594438
the new syntax is required:
`Cq-Depend: chromium:2594438`

[John Zhao (Code Review)]

John Zhao has uploaded a new patch set (#3) to the change originally created by John Zhao. ( https://review.coreboot.org/c/coreboot/+/48649 )

Change subject: mb/google/volteer: Set FORCE_PWR low at boot time
......................................................................

mb/google/volteer: Set FORCE_PWR low at boot time

While FORCE_PWR is set high, it prevents retimer from entering low power
state. S0ix failure occurs while USB4 Gatkex is connected on Port-0.
This change sets FORCE_PWR(GPP_H10) low. This FORCE_PWR GPIO will be
toggled by kernel through DSM method while updating retimer firmware.

BUG=b:174166586
Cq-Depend: chromium:2594438
TEST=Verifed s0ix cycles with USB4 Gatkex connected on Port-0.

Signed-off-by: John Zhao 
Change-Id: Ie4b442e1078379c522a94bfdc00cd99e6f9b8170
---
M src/mainboard/google/volteer/variants/baseboard/gpio.c
M src/mainboard/google/volteer/variants/terrador/gpio.c
M src/mainboard/google/volteer/variants/todor/gpio.c
M src/mainboard/google/volteer/variants/voema/gpio.c
4 files changed, 4 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/48649/3

[John Zhao (Code Review)]

Attention is currently required from: John Zhao.
John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48649 )

Change subject: mb/google/volteer: Set FORCE_PWR low at boot time
......................................................................

Patch Set 3:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/48649/comment/bb0939a5_f96d71d6 
PS2, Line 15: CQ-DEPEND=CL:*2594438
> the new syntax is required: […]

Ack

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/48649 )

Change subject: mb/google/volteer: Set FORCE_PWR low at boot time
......................................................................

mb/google/volteer: Set FORCE_PWR low at boot time

While FORCE_PWR is set high, it prevents retimer from entering low power
state. S0ix failure occurs while USB4 Gatkex is connected on Port-0.
This change sets FORCE_PWR(GPP_H10) low. This FORCE_PWR GPIO will be
toggled by kernel through DSM method while updating retimer firmware.

BUG=b:174166586
Cq-Depend: chromium:2594438
TEST=Verifed s0ix cycles with USB4 Gatkex connected on Port-0.

Signed-off-by: John Zhao 
Change-Id: Ie4b442e1078379c522a94bfdc00cd99e6f9b8170
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48649
Tested-by: build bot (Jenkins) 
Reviewed-by: Duncan Laurie 
Reviewed-by: Tim Wawrzynczak 
---
M src/mainboard/google/volteer/variants/baseboard/gpio.c
M src/mainboard/google/volteer/variants/terrador/gpio.c
M src/mainboard/google/volteer/variants/todor/gpio.c
M src/mainboard/google/volteer/variants/voema/gpio.c
4 files changed, 4 insertions(+), 4 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Duncan Laurie: Looks good to me, approved
  Tim Wawrzynczak: Looks good to me, approved

diff --git a/src/mainboard/google/volteer/variants/baseboard/gpio.c b/src/mainboard/google/volteer/variants/baseboard/gpio.c
index 922d3d1..2030f31 100644
--- a/src/mainboard/google/volteer/variants/baseboard/gpio.c
+++ b/src/mainboard/google/volteer/variants/baseboard/gpio.c
@@ -308,7 +308,7 @@
    /* H9  : I2C4_SCL ==> NC */
    PAD_NC(GPP_H9, NONE),
    /* H10 : SRCCLKREQ4# ==> USB_C1_RT_FORCE_PWR */
-	PAD_CFG_GPO(GPP_H10, 1, DEEP),
+	PAD_CFG_GPO(GPP_H10, 0, DEEP),
    /* H11 : SRCCLKREQ5# ==> NC */
    PAD_NC(GPP_H11, NONE),
    /* H12 : M2_SKT2_CFG0 ==> NONE */
diff --git a/src/mainboard/google/volteer/variants/terrador/gpio.c b/src/mainboard/google/volteer/variants/terrador/gpio.c
index d5498d0..79722d8 100644
--- a/src/mainboard/google/volteer/variants/terrador/gpio.c
+++ b/src/mainboard/google/volteer/variants/terrador/gpio.c
@@ -139,7 +139,7 @@
    /* H3  : SX_EXIT_HOLDOFF# ==> SD_PERST_L */
    PAD_CFG_GPO(GPP_H3, 1, DEEP),
    /* H10 : SRCCLKREQ4# ==> USB_C_MIX_RT_FORCE_PWR */
-	PAD_CFG_GPO(GPP_H10, 1, DEEP),
+	PAD_CFG_GPO(GPP_H10, 0, DEEP),
    /* H13 : M2_SKT2_CFG1 # ==> SPKR_INT_L */
    PAD_CFG_GPI(GPP_H13, NONE, DEEP),
    /* H16 : DDPB_CTRLCLK ==> DDPB_HDMI_CTRLCLK */
diff --git a/src/mainboard/google/volteer/variants/todor/gpio.c b/src/mainboard/google/volteer/variants/todor/gpio.c
index 40d25a5..0391964 100644
--- a/src/mainboard/google/volteer/variants/todor/gpio.c
+++ b/src/mainboard/google/volteer/variants/todor/gpio.c
@@ -147,7 +147,7 @@
    /* H3  : SX_EXIT_HOLDOFF# ==> SD_PERST_L */
    PAD_CFG_GPO(GPP_H3, 1, DEEP),
    /* H10 : SRCCLKREQ4# ==> USB_C_MIX_RT_FORCE_PWR */
-	PAD_CFG_GPO(GPP_H10, 1, DEEP),
+	PAD_CFG_GPO(GPP_H10, 0, DEEP),
    /* H13 : M2_SKT2_CFG1 # ==> SPKR_INT_L */
    PAD_CFG_GPI(GPP_H13, NONE, DEEP),
    /* H16 : DDPB_CTRLCLK ==> DDPB_HDMI_CTRLCLK */
diff --git a/src/mainboard/google/volteer/variants/voema/gpio.c b/src/mainboard/google/volteer/variants/voema/gpio.c
index d905dae..5bf6fad 100644
--- a/src/mainboard/google/volteer/variants/voema/gpio.c
+++ b/src/mainboard/google/volteer/variants/voema/gpio.c
@@ -137,7 +137,7 @@
    /* H3  : SX_EXIT_HOLDOFF# ==> SD_PERST_L */
    PAD_CFG_GPO(GPP_H3, 1, DEEP),
    /* H10 : SRCCLKREQ4# ==> USB_C_MIX_RT_FORCE_PWR */
-	PAD_CFG_GPO(GPP_H10, 1, DEEP),
+	PAD_CFG_GPO(GPP_H10, 0, DEEP),
    /* H13 : M2_SKT2_CFG1 # ==> SPKR_INT_L */
    PAD_CFG_GPI(GPP_H13, NONE, DEEP),
    /* H16 : DDPB_CTRLCLK ==> DDPB_HDMI_CTRLCLK */