Attention is currently required from: Arthur Heymans. Hello Arthur Heymans,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/56912
to review the following change.
Change subject: [WIP]nb/intel/sandybridge: Use a chipset devicetree ......................................................................
[WIP]nb/intel/sandybridge: Use a chipset devicetree
This allows to reduce boilerplate a lot
Change-Id: I9c5b6f25b779e28b6719cf70455ff0f1a916ad87 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/mainboard/lenovo/x220/devicetree.cb M src/northbridge/intel/sandybridge/Kconfig A src/northbridge/intel/sandybridge/chipset.cb 3 files changed, 73 insertions(+), 37 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/56912/1
diff --git a/src/mainboard/lenovo/x220/devicetree.cb b/src/mainboard/lenovo/x220/devicetree.cb index 53eb23a..ee3b97e 100644 --- a/src/mainboard/lenovo/x220/devicetree.cb +++ b/src/mainboard/lenovo/x220/devicetree.cb @@ -15,24 +15,10 @@ register "gpu_cpu_backlight" = "0x1155" register "gpu_pch_backlight" = "0x06100610"
- device cpu_cluster 0 on - chip cpu/intel/model_206ax - # Magic APIC ID to locate this chip - device lapic 0 on end - device lapic 0xacac off end - - register "acpi_c1" = "1" # ACPI(C1) = MWAIT(C1) - register "acpi_c2" = "3" # ACPI(C2) = MWAIT(C3) - register "acpi_c3" = "5" # ACPI(C3) = MWAIT(C7) - end - end - device domain 0 on subsystemid 0x17aa 0x21db inherit
- device pci 00.0 on end # host bridge - device pci 01.0 off end # PCIe Bridge for discrete graphics - device pci 02.0 on end # vga controller + device ref igd on end # vga controller
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH # GPI routing @@ -60,34 +46,28 @@ register "spi_uvscc" = "0x2005" register "spi_lvscc" = "0x2005"
- device pci 16.0 off end # Management Engine Interface 1 - device pci 16.1 off end # Management Engine Interface 2 - device pci 16.2 off end # Management Engine IDE-R - device pci 16.3 off end # Management Engine KT - device pci 19.0 on + device ref gbe on subsystemid 0x17aa 0x21ce end # Intel Gigabit Ethernet - device pci 1a.0 on end # USB2 EHCI #2 - device pci 1b.0 on end # High Definition Audio - device pci 1c.0 on end # PCIe Port #1 - device pci 1c.1 on end # PCIe Port #2 (wlan) - device pci 1c.2 on end # PCIe Port #3 - device pci 1c.3 on + device ref ehci2 on end # USB2 EHCI #2 + device ref hda on end # High Definition Audio + device ref rp1 on end # PCIe Port #1 + device ref rp2 on end # PCIe Port #2 (wlan) + device ref rp3 on end # PCIe Port #3 + device ref rp4 on smbios_slot_desc "7" "3" "ExpressCard Slot" "8" end # PCIe Port #4 - device pci 1c.4 on + device ref rp5 on chip drivers/ricoh/rce822 register "sdwppol" = "1" register "disable_mask" = "0x87" device pci 00.0 on end end end # PCIe Port #5 (SD) - device pci 1c.5 off end # PCIe Port #6 - device pci 1c.6 on end # PCIe Port #7 - device pci 1c.7 off end # PCIe Port #8 - device pci 1d.0 on end # USB2 EHCI #1 - device pci 1e.0 off end # PCI bridge - device pci 1f.0 on #LPC bridge + device ref rp7 on end # PCIe Port #7 + device ref ehci1 on end # USB2 EHCI #1 + device ref pci_b off end # PCI bridge + device ref lpc on #LPC bridge chip ec/lenovo/pmh7 device pnp ff.1 on end # dummy register "backlight_enable" = "0x01" @@ -139,8 +119,8 @@ register "wwan_gpio_lvl" = "0" end end # LPC bridge - device pci 1f.2 on end # SATA Controller 1 - device pci 1f.3 on + device ref sata1 on end # SATA Controller 1 + device ref smbus on # eeprom, 8 virtual devices, same chip chip drivers/i2c/at24rf08c device i2c 54 on end @@ -153,8 +133,7 @@ device i2c 5f on end end end # SMBus - device pci 1f.5 off end # SATA Controller 2 - device pci 1f.6 on end # Thermal + device ref thermal on end # Thermal end end end diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig index 501ca9f..5c76b7b 100644 --- a/src/northbridge/intel/sandybridge/Kconfig +++ b/src/northbridge/intel/sandybridge/Kconfig @@ -9,6 +9,10 @@
if NORTHBRIDGE_INTEL_SANDYBRIDGE
+config CHIPSET_DEVICETREE + string + default "northbridge/intel/sandybridge/chipset.cb" + config SANDYBRIDGE_VBOOT_IN_ROMSTAGE bool default n diff --git a/src/northbridge/intel/sandybridge/chipset.cb b/src/northbridge/intel/sandybridge/chipset.cb new file mode 100644 index 0000000..59ea0b0 --- /dev/null +++ b/src/northbridge/intel/sandybridge/chipset.cb @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: GPL-2.0-only + +chip northbridge/intel/sandybridge + device cpu_cluster 0 on + chip cpu/intel/model_206ax + # Magic APIC ID to locate this chip + device lapic 0 on end + device lapic 0xacac off end + + register "acpi_c1" = "1" # ACPI(C1) = MWAIT(C1) + register "acpi_c2" = "3" # ACPI(C2) = MWAIT(C3) + register "acpi_c3" = "5" # ACPI(C3) = MWAIT(C7) + end + end + + device domain 0 on + subsystemid 0x17aa 0x21db inherit + + device pci 00.0 alias hb on end # host bridge + device pci 01.0 alias peg10 off end # PEG10 + device pci 01.1 alias peg11 off end # PEG11 + device pci 01.2 alias peg12 off end # PEG12 + device pci 02.0 alias igd off end # vga controller + device pci 04.0 alias dev4 off end # Device 4 + device pci 06.0 alias peg60 off end # PEG60 + + chip southbridge/intel/bd82x6x # Intel Series 6/7 PCH + device pci 14.0 alias xhci off end # USB 3.0 Controller + device pci 16.0 alias mei1 off end # Management Engine Interface 1 + device pci 16.1 alias mei2 off end # Management Engine Interface 2 + device pci 16.2 alias me_ide_r off end # Management Engine IDE-R + device pci 16.3 alias me_kt off end # Management Engine KT + device pci 19.0 alias gbe off end # Intel Gigabit Ethernet + device pci 1a.0 alias ehci2 off end # USB2 EHCI #2 + device pci 1b.0 alias hda off end # High Definition Audio + device pci 1c.0 alias rp1 off end # PCIe Port #1 + device pci 1c.1 alias rp2 off end # PCIe Port #2 + device pci 1c.2 alias rp3 off end # PCIe Port #3 + device pci 1c.3 alias rp4 off end # PCIe Port #4 + device pci 1c.4 alias rp5 off end # PCIe Port #5 + device pci 1c.5 alias rp6 off end # PCIe Port #6 + device pci 1c.6 alias rp7 off end # PCIe Port #7 + device pci 1c.7 alias rp8 off end # PCIe Port #8 + device pci 1d.0 alias ehci1 off end # USB2 EHCI #1 + device pci 1e.0 alias pci_b off end # PCI bridge + device pci 1f.0 alias lpc off end # LPC bridge + device pci 1f.2 alias sata1 off end # SATA Controller 1 + device pci 1f.3 alias smbus off end # SMBus + device pci 1f.5 alias sata2 off end # SATA Controller 2 + device pci 1f.6 alias thermal off end # Thermal + end + end +end