Change in coreboot[master]: soc/mediatek/mt8195: update devapc settings

[Rex-BC Chen (Code Review)]

Attention is currently required from: Hung-Te Lin.
Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/59746

to look at the new patch set (#4).

Change subject: soc/mediatek/mt8195: update devapc settings
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soc/mediatek/mt8195: update devapc settings

In previous patch(chromium:2972318), we only add basic drivers and
settings, so we add this patch to set devapc final settings on MT8195.

1. Update permission setting
2. Updtate master domain setting:
   - domain 1: PCIE0, PCIE1
   - domain 2: SPM, SSPM, CPU_EB
3. Set domain remap
   - MMSYS (4-bit to 2-bit)
   - TINYSYS (4-bit to 3-bit)
   - TINYSYS (3-bit to 4-bit)
   - TINYSYS to EMI (3-bit to 4-bit)
   - INFRA2 (3-bit to 4-bit)
4. Set SCP domain and ADSP domain
   - domain 3: SCP
   - domain 4: ADSP

BUG=b:204347737
TEST=build pass

Change-Id: I1846d56d2dc362de64b28e0ed9a0681f186af7ee
Signed-off-by: Nina Wu 
---
M src/soc/mediatek/mt8195/devapc.c
M src/soc/mediatek/mt8195/include/soc/addressmap.h
M src/soc/mediatek/mt8195/include/soc/devapc.h
3 files changed, 274 insertions(+), 142 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/59746/4