Patch set updated for coreboot: b039953 AMD K8: Define MEM_TRAIN_SEQ only with K8_REV_F_SUPPORT
Kyösti Mälkki (kyosti.malkki@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4558
-gerrit
commit b039953dcea6750ac4b454cd234591eff32c027c Author: Kyösti Mälkki kyosti.malkki@gmail.com Date: Sun Dec 22 20:48:40 2013 +0200
AMD K8: Define MEM_TRAIN_SEQ only with K8_REV_F_SUPPORT
Change-Id: I601efbff03d0f0f59557b33be8d6928ede310b62 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- src/cpu/amd/model_fxx/init_cpus.c | 3 ++- src/cpu/amd/model_fxx/model_fxx_init.c | 2 ++ src/mainboard/asus/a8n_e/Kconfig | 4 ---- src/mainboard/msi/ms7135/Kconfig | 4 ---- src/northbridge/amd/amdk8/Kconfig | 8 ++++---- 5 files changed, 8 insertions(+), 13 deletions(-)
diff --git a/src/cpu/amd/model_fxx/init_cpus.c b/src/cpu/amd/model_fxx/init_cpus.c index 7121642..6ba5025 100644 --- a/src/cpu/amd/model_fxx/init_cpus.c +++ b/src/cpu/amd/model_fxx/init_cpus.c @@ -293,11 +293,12 @@ static u32 init_cpus(u32 cpu_init_detectedx) } lapic_write(LAPIC_MSG_REG, (apicid << 24) | 0x44); // bsp can not check it before stop_this_cpu set_var_mtrr(0, 0x00000000, CONFIG_RAMTOP, MTRR_TYPE_WRBACK); +#if CONFIG_K8_REV_F_SUPPORT #if CONFIG_MEM_TRAIN_SEQ == 1 train_ram_on_node(id.nodeid, id.coreid, sysinfo, (unsigned)STOP_CAR_AND_CPU); #endif - +#endif STOP_CAR_AND_CPU(); }
diff --git a/src/cpu/amd/model_fxx/model_fxx_init.c b/src/cpu/amd/model_fxx/model_fxx_init.c index 4beecab..260e83e 100644 --- a/src/cpu/amd/model_fxx/model_fxx_init.c +++ b/src/cpu/amd/model_fxx/model_fxx_init.c @@ -31,11 +31,13 @@ #if CONFIG_WAIT_BEFORE_CPUS_INIT void cpus_ready_for_init(void) { +#if CONFIG_K8_REV_F_SUPPORT #if CONFIG_MEM_TRAIN_SEQ == 1 struct sys_info *sysinfox = (struct sys_info *)((CONFIG_RAMTOP) - sizeof(*sysinfox)); // wait for ap memory to trained wait_all_core0_mem_trained(sysinfox); #endif +#endif } #endif
diff --git a/src/mainboard/asus/a8n_e/Kconfig b/src/mainboard/asus/a8n_e/Kconfig index acb528b..ba2e5b1 100644 --- a/src/mainboard/asus/a8n_e/Kconfig +++ b/src/mainboard/asus/a8n_e/Kconfig @@ -31,10 +31,6 @@ config APIC_ID_OFFSET hex default 0x0
-config MEM_TRAIN_SEQ - int - default 2 - config SB_HT_CHAIN_ON_BUS0 int default 2 diff --git a/src/mainboard/msi/ms7135/Kconfig b/src/mainboard/msi/ms7135/Kconfig index 14c0f49..76b6625 100644 --- a/src/mainboard/msi/ms7135/Kconfig +++ b/src/mainboard/msi/ms7135/Kconfig @@ -24,10 +24,6 @@ config APIC_ID_OFFSET hex default 0x0
-config MEM_TRAIN_SEQ - int - default 2 - config MAINBOARD_PART_NUMBER string default "MS-7135" diff --git a/src/northbridge/amd/amdk8/Kconfig b/src/northbridge/amd/amdk8/Kconfig index 294002e..ce2460e 100644 --- a/src/northbridge/amd/amdk8/Kconfig +++ b/src/northbridge/amd/amdk8/Kconfig @@ -37,10 +37,6 @@ config WAIT_BEFORE_CPUS_INIT bool default n
-config MEM_TRAIN_SEQ - int - default 0 - # Force 2T DRAM timing (vendor BIOS does it even for single DIMM setups and # single DIMM is indeed unreliable without it). config K8_FORCE_2T_DRAM_TIMING @@ -99,6 +95,10 @@ if DIMM_DDR2 endif endif #DIMM_DDR2
+config MEM_TRAIN_SEQ + int + default 0 + endif #K8_REV_F_SUPPORT
config IOMMU
-
Kyösti Mälkki