Change in coreboot[master]: soc/intel/common: Log CSE FW Status Registers before triggering recovery
Sridhar Siricilla has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43537 )
Change subject: soc/intel/common: Log CSE FW Status Registers before triggering recovery ......................................................................
soc/intel/common: Log CSE FW Status Registers before triggering recovery
The patch log CSE Firmware Status Registers(FWSTS1, FWSTS2 & FWSTS3) before triggering recovery to help debugging.
Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com Change-Id: I90e9f5897408bfc37a69cf0bb23bff18a146b9e2 --- M src/soc/intel/common/block/cse/cse_lite.c 1 file changed, 8 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/43537/1
diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c index a12f2d0..e51b8d6 100644 --- a/src/soc/intel/common/block/cse/cse_lite.c +++ b/src/soc/intel/common/block/cse/cse_lite.c @@ -153,8 +153,16 @@ struct cse_bp_info bp_info; } __packed;
+static void cse_log_status_registers(void) +{ + printk(BIOS_DEBUG, "cse_lite: CSE status registers: HFSTS1:0x%x, HFSTS2:0x%x HFST3:0x%x\n", + me_read_config32(PCI_ME_HFSTS1), me_read_config32(PCI_ME_HFSTS2), me_read_config32(PCI_ME_HFSTS3)); +} + static void cse_trigger_recovery(uint8_t rec_sub_code) { + /* Log CSE Firmware Status Registers to help debugging */ + cse_log_status_registers(); if (CONFIG(VBOOT)) { struct vb2_context *ctx; ctx = vboot_get_context();
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43537 )
Change subject: soc/intel/common: Log CSE FW Status Registers before triggering recovery ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/43537/2/src/soc/intel/common/block/... File src/soc/intel/common/block/cse/cse_lite.c:
https://review.coreboot.org/c/coreboot/+/43537/2/src/soc/intel/common/block/... PS2, Line 159: me_read_config32(PCI_ME_HFSTS1), me_read_config32(PCI_ME_HFSTS2), me_read_config32(PCI_ME_HFSTS3)); line over 96 characters
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43537 )
Change subject: soc/intel/common: Log CSE FW Status Registers before triggering recovery ......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/c/coreboot/+/43537/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/43537/2//COMMIT_MSG@9 PS2, Line 9: log logs
https://review.coreboot.org/c/coreboot/+/43537/2/src/soc/intel/common/block/... File src/soc/intel/common/block/cse/cse_lite.c:
https://review.coreboot.org/c/coreboot/+/43537/2/src/soc/intel/common/block/... PS2, Line 158: printk(BIOS_DEBUG, "cse_lite: CSE status registers: HFSTS1:0x%x, HFSTS2:0x%x HFST3:0x%x\n", Please add a space after the colon of the register names.
Hello build bot (Jenkins), Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43537
to look at the new patch set (#3).
Change subject: soc/intel/common: Log CSE FW Status Registers before triggering recovery ......................................................................
soc/intel/common: Log CSE FW Status Registers before triggering recovery
The patch logs CSE Firmware Status Registers(FWSTS1, FWSTS2 & FWSTS3) before triggering recovery to help debugging.
BUG=b:159962240 Test=Verified on hatch
Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com Change-Id: I90e9f5897408bfc37a69cf0bb23bff18a146b9e2 --- M src/soc/intel/common/block/cse/cse_lite.c 1 file changed, 9 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/43537/3
Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43537 )
Change subject: soc/intel/common: Log CSE FW Status Registers before triggering recovery ......................................................................
Patch Set 3:
(2 comments)
https://review.coreboot.org/c/coreboot/+/43537/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/43537/2//COMMIT_MSG@9 PS2, Line 9: log
logs
Ack
https://review.coreboot.org/c/coreboot/+/43537/2/src/soc/intel/common/block/... File src/soc/intel/common/block/cse/cse_lite.c:
https://review.coreboot.org/c/coreboot/+/43537/2/src/soc/intel/common/block/... PS2, Line 158: printk(BIOS_DEBUG, "cse_lite: CSE status registers: HFSTS1:0x%x, HFSTS2:0x%x HFST3:0x%x\n",
Please add a space after the colon of the register names.
Ack
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43537 )
Change subject: soc/intel/common: Log CSE FW Status Registers before triggering recovery ......................................................................
Patch Set 9: Code-Review+2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43537 )
Change subject: soc/intel/common: Log CSE FW Status Registers before triggering recovery ......................................................................
Patch Set 12: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/43537/12/src/soc/intel/common/block... File src/soc/intel/common/block/cse/cse_lite.c:
https://review.coreboot.org/c/coreboot/+/43537/12/src/soc/intel/common/block... PS12, Line 159: HFST3 nit: HFSTS3
Hello build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Rizwan Qureshi, Angel Pons, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43537
to look at the new patch set (#13).
Change subject: soc/intel/common: Log CSE FW Status Registers before triggering recovery ......................................................................
soc/intel/common: Log CSE FW Status Registers before triggering recovery
The patch logs CSE Firmware Status Registers(FWSTS1, FWSTS2 & FWSTS3) before triggering recovery to help debugging.
BUG=b:159962240 Test=Verified on hatch
Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com Change-Id: I90e9f5897408bfc37a69cf0bb23bff18a146b9e2 --- M src/soc/intel/common/block/cse/cse_lite.c 1 file changed, 9 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/43537/13
Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43537 )
Change subject: soc/intel/common: Log CSE FW Status Registers before triggering recovery ......................................................................
Patch Set 13:
(1 comment)
https://review.coreboot.org/c/coreboot/+/43537/12/src/soc/intel/common/block... File src/soc/intel/common/block/cse/cse_lite.c:
https://review.coreboot.org/c/coreboot/+/43537/12/src/soc/intel/common/block... PS12, Line 159: HFST3
nit: HFSTS3
Ack
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43537 )
Change subject: soc/intel/common: Log CSE FW Status Registers before triggering recovery ......................................................................
Patch Set 13: Code-Review+2
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43537 )
Change subject: soc/intel/common: Log CSE FW Status Registers before triggering recovery ......................................................................
Patch Set 13: Code-Review+2
Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/43537 )
Change subject: soc/intel/common: Log CSE FW Status Registers before triggering recovery ......................................................................
soc/intel/common: Log CSE FW Status Registers before triggering recovery
The patch logs CSE Firmware Status Registers(FWSTS1, FWSTS2 & FWSTS3) before triggering recovery to help debugging.
BUG=b:159962240 Test=Verified on hatch
Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com Change-Id: I90e9f5897408bfc37a69cf0bb23bff18a146b9e2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/43537 Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/common/block/cse/cse_lite.c 1 file changed, 9 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c index a12f2d0..ff489af 100644 --- a/src/soc/intel/common/block/cse/cse_lite.c +++ b/src/soc/intel/common/block/cse/cse_lite.c @@ -153,8 +153,17 @@ struct cse_bp_info bp_info; } __packed;
+static void cse_log_status_registers(void) +{ + printk(BIOS_DEBUG, "cse_lite: CSE status registers: HFSTS1: 0x%x, HFSTS2: 0x%x " + "HFSTS3: 0x%x\n", me_read_config32(PCI_ME_HFSTS1), + me_read_config32(PCI_ME_HFSTS2), me_read_config32(PCI_ME_HFSTS3)); +} + static void cse_trigger_recovery(uint8_t rec_sub_code) { + /* Log CSE Firmware Status Registers to help debugging */ + cse_log_status_registers(); if (CONFIG(VBOOT)) { struct vb2_context *ctx; ctx = vboot_get_context();
-
Angel Pons (Code Review) -
build bot (Jenkins) (Code Review)
-
Paul Menzel (Code Review)
-
Sridhar Siricilla (Code Review)
-
Subrata Banik (Code Review)
-
Tim Wawrzynczak (Code Review)