[XS] Change in coreboot[master]: soc/intel/xeon_sp: Fix HEST table length

[Ziang Wang (Code Review)]

Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Tim Chu, Yiwei Tang, Ziang Wang.

Hello Arthur Heymans, Christian Walter, Jeff Li, Johnny Lin, Lean Sheng Tan, Nico Huber, Paul Menzel, Tim Chu, Yiwei Tang, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/75738?usp=email

to look at the new patch set (#2).

Change subject: soc/intel/xeon_sp: Fix HEST table length
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soc/intel/xeon_sp: Fix HEST table length

"current" points to the start of HEST table, so "next - current" already
includes the size of its header, no need for increment here. This issue
was found on SPR-SP platform. The length of HEST table is now correct
with this patch.

Change-Id: I6ff1e8e24612b7356772d582ff9a7e53863419db
Signed-off-by: Jeff Li 
Signed-off-by: Ziang Wang 
---
M src/soc/intel/xeon_sp/ras/hest.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/75738/2