Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43851 )
Change subject: skylake boards: Factor out copy-pasted PIRQ routes ......................................................................
skylake boards: Factor out copy-pasted PIRQ routes
Put them in common code just in case something depends on the values.
Change-Id: Ief526efcbd5ba5546572da1bc6bb6d86729f4e54 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/51nb/x210/devicetree.cb M src/mainboard/asrock/h110m/devicetree.cb M src/mainboard/facebook/monolith/devicetree.cb M src/mainboard/google/eve/devicetree.cb M src/mainboard/google/fizz/variants/baseboard/devicetree.cb M src/mainboard/google/glados/devicetree.cb M src/mainboard/google/poppy/variants/atlas/devicetree.cb M src/mainboard/google/poppy/variants/baseboard/devicetree.cb M src/mainboard/google/poppy/variants/nami/devicetree.cb M src/mainboard/google/poppy/variants/nautilus/devicetree.cb M src/mainboard/google/poppy/variants/nocturne/devicetree.cb M src/mainboard/google/poppy/variants/rammus/devicetree.cb M src/mainboard/google/poppy/variants/soraka/devicetree.cb M src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb M src/mainboard/intel/kunimitsu/devicetree.cb M src/mainboard/libretrend/lt1000/devicetree.cb M src/mainboard/protectli/vault_kbl/devicetree.cb M src/mainboard/purism/librem_skl/devicetree.cb M src/mainboard/razer/blade_stealth_kbl/devicetree.cb M src/mainboard/supermicro/x11-lga1151-series/devicetree.cb M src/soc/intel/skylake/irq.c 21 files changed, 12 insertions(+), 193 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/43851/1
diff --git a/src/mainboard/51nb/x210/devicetree.cb b/src/mainboard/51nb/x210/devicetree.cb index b610904..8e775b5 100644 --- a/src/mainboard/51nb/x210/devicetree.cb +++ b/src/mainboard/51nb/x210/devicetree.cb @@ -71,15 +71,6 @@
register "serirq_mode" = "SERIRQ_CONTINUOUS"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - register "PmConfigPciClockRun" = "1"
# Enable Root Ports 3, 4 and 9 diff --git a/src/mainboard/asrock/h110m/devicetree.cb b/src/mainboard/asrock/h110m/devicetree.cb index 1327a36..977fa29 100644 --- a/src/mainboard/asrock/h110m/devicetree.cb +++ b/src/mainboard/asrock/h110m/devicetree.cb @@ -42,15 +42,6 @@ register "DspEnable" = "0" register "PchHdaVcType" = "Vc1"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # Set LPC Serial IRQ mode register "serirq_mode" = "SERIRQ_CONTINUOUS"
diff --git a/src/mainboard/facebook/monolith/devicetree.cb b/src/mainboard/facebook/monolith/devicetree.cb index 102450a..751da3e 100644 --- a/src/mainboard/facebook/monolith/devicetree.cb +++ b/src/mainboard/facebook/monolith/devicetree.cb @@ -62,15 +62,6 @@ [7] = 0, \ }"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # Enabling SLP_S3#, SLP_S4#, SLP_SUS and SLP_A Stretch # SLP_S3 Minimum Assertion Width. Values 0: 60us, 1: 1ms, 2: 50ms, 3: 2s register "PmConfigSlpS3MinAssert" = "2" diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb index 3b1f22c..e26128d 100644 --- a/src/mainboard/google/eve/devicetree.cb +++ b/src/mainboard/google/eve/devicetree.cb @@ -62,15 +62,6 @@ register "PmConfigSlpAMinAssert" = "3" # 2s register "PmTimerDisabled" = "1"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ #| Domain/Setting | SA | IA | GTUS | GTS | diff --git a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb index b8455fe..d959b81 100644 --- a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb @@ -98,15 +98,6 @@ # send VR mailbox command for IA/GT/SA rails register "IslVrCmd" = "2"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ #| Domain/Setting | SA | IA | GTUS | GTS | diff --git a/src/mainboard/google/glados/devicetree.cb b/src/mainboard/google/glados/devicetree.cb index f7be80d..84e9693 100644 --- a/src/mainboard/google/glados/devicetree.cb +++ b/src/mainboard/google/glados/devicetree.cb @@ -64,15 +64,6 @@ register "PmConfigSlpAMinAssert" = "3" # 2s register "PmTimerDisabled" = "1"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # Enable Root port 1 register "PcieRpEnable[0]" = "1" # Enable CLKREQ# diff --git a/src/mainboard/google/poppy/variants/atlas/devicetree.cb b/src/mainboard/google/poppy/variants/atlas/devicetree.cb index ce943c4..d54f716 100644 --- a/src/mainboard/google/poppy/variants/atlas/devicetree.cb +++ b/src/mainboard/google/poppy/variants/atlas/devicetree.cb @@ -77,15 +77,6 @@ }" register "tcc_offset" = "10"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ #| Domain/Setting | SA | IA | GTUS | GTS | diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb index d57070e..f270b19 100644 --- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb @@ -59,15 +59,6 @@ register "PmConfigSlpAMinAssert" = "3" # 2s register "PmTimerDisabled" = "1"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ #| Domain/Setting | SA | IA | GTUS | GTS | diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb index a4dcad0..78c7d36 100644 --- a/src/mainboard/google/poppy/variants/nami/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb @@ -62,15 +62,6 @@ # send VR mailbox command for IA/GT/SA rails register "IslVrCmd" = "2"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ #| Domain/Setting | SA | IA | GTUS | GTS | diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb index a5f997a..7812646 100644 --- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb @@ -59,15 +59,6 @@ register "PmConfigSlpAMinAssert" = "3" # 2s register "PmTimerDisabled" = "1"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # VR Slew rate setting for improving audible noise register "AcousticNoiseMitigation" = "1" register "FastPkgCRampDisableIa" = "1" diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb index 8819350..2eb7bd2 100644 --- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb @@ -73,15 +73,6 @@ }" register "tcc_offset" = "10"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ #| Domain/Setting | SA | IA | GTUS | GTS | diff --git a/src/mainboard/google/poppy/variants/rammus/devicetree.cb b/src/mainboard/google/poppy/variants/rammus/devicetree.cb index de7023d..531e30d 100644 --- a/src/mainboard/google/poppy/variants/rammus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/rammus/devicetree.cb @@ -69,15 +69,6 @@ register "PmConfigSlpAMinAssert" = "3" # 2s register "PmTimerDisabled" = "1"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ #| Domain/Setting | SA | IA | GTUS | GTS | diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb index 8c22ade..03f2979 100644 --- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb +++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb @@ -59,15 +59,6 @@ register "PmConfigSlpAMinAssert" = "3" # 2s register "PmTimerDisabled" = "1"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ #| Domain/Setting | SA | IA | GTUS | GTS | diff --git a/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb index b14fe31..b7e1cc0 100644 --- a/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb +++ b/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb @@ -32,15 +32,6 @@ register "SaGv" = "SaGv_Enabled" register "PchHdaVcType" = "Vc1"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # Enabling SLP_S3#, SLP_S4#, SLP_SUS and SLP_A Stretch # SLP_S3 Minimum Assertion Width. Values 0: 60us, 1: 1ms, 2: 50ms, 3: 2s register "PmConfigSlpS3MinAssert" = "2" diff --git a/src/mainboard/intel/kunimitsu/devicetree.cb b/src/mainboard/intel/kunimitsu/devicetree.cb index acd197b..51ff562 100644 --- a/src/mainboard/intel/kunimitsu/devicetree.cb +++ b/src/mainboard/intel/kunimitsu/devicetree.cb @@ -37,15 +37,6 @@ register "SaGv" = "SaGv_Enabled" register "PmTimerDisabled" = "1"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # Enabling SLP_S3#, SLP_S4#, SLP_SUS and SLP_A Stretch # SLP_S3 Minimum Assertion Width. Values 0: 60us, 1: 1ms, 2: 50ms, 3: 2s register "PmConfigSlpS3MinAssert" = "0x02" diff --git a/src/mainboard/libretrend/lt1000/devicetree.cb b/src/mainboard/libretrend/lt1000/devicetree.cb index 95874bb..dabef4b 100644 --- a/src/mainboard/libretrend/lt1000/devicetree.cb +++ b/src/mainboard/libretrend/lt1000/devicetree.cb @@ -69,15 +69,6 @@ register "PmConfigSlpAMinAssert" = "3" # 2s register "PmTimerDisabled" = "1"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------------+-------+ #| Domain/Setting | SA | IA | GT-Unsliced | GT | diff --git a/src/mainboard/protectli/vault_kbl/devicetree.cb b/src/mainboard/protectli/vault_kbl/devicetree.cb index bb408a4..5f757e8 100644 --- a/src/mainboard/protectli/vault_kbl/devicetree.cb +++ b/src/mainboard/protectli/vault_kbl/devicetree.cb @@ -60,15 +60,6 @@ register "PmConfigSlpSusMinAssert" = "1" # 500ms register "PmConfigSlpAMinAssert" = "3" # 2s
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ #| Domain/Setting | SA | IA | GTUS | GTS | diff --git a/src/mainboard/purism/librem_skl/devicetree.cb b/src/mainboard/purism/librem_skl/devicetree.cb index d44d2ad..51f6ba4 100644 --- a/src/mainboard/purism/librem_skl/devicetree.cb +++ b/src/mainboard/purism/librem_skl/devicetree.cb @@ -78,15 +78,6 @@ # EC/KBC requires continuous mode register "serirq_mode" = "SERIRQ_CONTINUOUS"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # VR Settings Configuration for 4 Domains #+----------------+-----------+-----------+-------------+----------+ #| Domain/Setting | SA | IA | GT Unsliced | GT | diff --git a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb index 7d54d33..dc7c42b 100644 --- a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb +++ b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb @@ -57,15 +57,6 @@
register "serirq_mode" = "SERIRQ_CONTINUOUS"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # VR Settings Configuration for 4 Domains #+----------------+-----------+-----------+-------------+----------+ #| Domain/Setting | SA | IA | GT Unsliced | GT | diff --git a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb index 0dd37ee..0447e70 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb +++ b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb @@ -15,15 +15,6 @@ register "Device4Enable" = "1" register "SaGv" = "SaGv_Disabled"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # SATA configuration register "SataMode" = "KBLFSP_SATA_MODE_AHCI" register "EnableSata" = "1" diff --git a/src/soc/intel/skylake/irq.c b/src/soc/intel/skylake/irq.c index dbc172f..129f132 100644 --- a/src/soc/intel/skylake/irq.c +++ b/src/soc/intel/skylake/irq.c @@ -240,18 +240,17 @@
void soc_pch_pirq_init(const struct device *dev) { - const config_t *config = config_of(dev); uint8_t pch_interrupt_routing[MAX_PXRC_CONFIG]; struct device *irq_dev;
- pch_interrupt_routing[0] = config->pirqa_routing; - pch_interrupt_routing[1] = config->pirqb_routing; - pch_interrupt_routing[2] = config->pirqc_routing; - pch_interrupt_routing[3] = config->pirqd_routing; - pch_interrupt_routing[4] = config->pirqe_routing; - pch_interrupt_routing[5] = config->pirqf_routing; - pch_interrupt_routing[6] = config->pirqg_routing; - pch_interrupt_routing[7] = config->pirqh_routing; + pch_interrupt_routing[0] = PCH_IRQ11; + pch_interrupt_routing[1] = PCH_IRQ10; + pch_interrupt_routing[2] = PCH_IRQ11; + pch_interrupt_routing[3] = PCH_IRQ11; + pch_interrupt_routing[4] = PCH_IRQ11; + pch_interrupt_routing[5] = PCH_IRQ11; + pch_interrupt_routing[6] = PCH_IRQ11; + pch_interrupt_routing[7] = PCH_IRQ11;
itss_irq_init(pch_interrupt_routing);
@@ -265,16 +264,16 @@
switch (int_pin) { case 1: /* INTA# */ - int_line = config->pirqa_routing; + int_line = pch_interrupt_routing[0]; break; case 2: /* INTB# */ - int_line = config->pirqb_routing; + int_line = pch_interrupt_routing[1]; break; case 3: /* INTC# */ - int_line = config->pirqc_routing; + int_line = pch_interrupt_routing[2]; break; case 4: /* INTD# */ - int_line = config->pirqd_routing; + int_line = pch_interrupt_routing[3]; break; }
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43851 )
Change subject: skylake boards: Factor out copy-pasted PIRQ routes ......................................................................
Patch Set 1: Code-Review+2
thanks!
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43851 )
Change subject: skylake boards: Factor out copy-pasted PIRQ routes ......................................................................
Patch Set 1:
Just a note, that on the KBL-U board [1], Linux does not list IRQ 11 in `/proc/interrupts` with the vendor firmware.
[1]: https://review.coreboot.org/c/coreboot/+/43760
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43851 )
Change subject: skylake boards: Factor out copy-pasted PIRQ routes ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/43851/1/src/soc/intel/skylake/irq.c File src/soc/intel/skylake/irq.c:
https://review.coreboot.org/c/coreboot/+/43851/1/src/soc/intel/skylake/irq.c... PS1, Line 247: pirqa_routing remove from chip.h?
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43851 )
Change subject: skylake boards: Factor out copy-pasted PIRQ routes ......................................................................
Patch Set 1:
(1 comment)
Just a note, that on the KBL-U board [1], Linux does not list IRQ 11 in `/proc/interrupts` with the vendor firmware.
You would have to disable APICs (and I guess SMP) to make use of these PIRQ routes.
https://review.coreboot.org/c/coreboot/+/43851/1/src/soc/intel/skylake/irq.c File src/soc/intel/skylake/irq.c:
https://review.coreboot.org/c/coreboot/+/43851/1/src/soc/intel/skylake/irq.c... PS1, Line 257: : for (irq_dev = all_devices; irq_dev; irq_dev = irq_dev->next) { : u8 int_pin = 0, int_line = 0; : : if (!irq_dev->enabled || irq_dev->path.type != DEVICE_PATH_PCI) : continue; : : int_pin = pci_read_config8(irq_dev, PCI_INTERRUPT_PIN); : : switch (int_pin) { : case 1: /* INTA# */ : int_line = config->pirqa_routing; : break; : case 2: /* INTB# */ : int_line = config->pirqb_routing; : break; : case 3: /* INTC# */ : int_line = config->pirqc_routing; : break; : case 4: /* INTD# */ : int_line = config->pirqd_routing; : break; : } : : if (!int_line) : continue; : : pci_write_config8(irq_dev, PCI_INTERRUPT_LINE, int_line); : } Should we just kill this? If you compare the results with reasonable values for the registers you got yourself an entropy generator (not a good one).
For integrated devices, the ACPI generator in sb/intel/common/ gives some hints. For downstream PCIe devices, one has to walk the links and apply swizzling. For PCI too, but the mapping for the slots on the PCI bridge is board specific.
If we drop the 10 for PIRQB, we could also just put 11 everywhere.
Hello Felix Singer, build bot (Jenkins), Michał Żygowski, Frans Hendriks, Michael Niewöhner, Patrick Rudolph, Wim Vervoorn, Piotr Król,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43851
to look at the new patch set (#2).
Change subject: skylake boards: Factor out copy-pasted PIRQ routes ......................................................................
skylake boards: Factor out copy-pasted PIRQ routes
Put them in common code just in case something depends on the values.
Change-Id: Ief526efcbd5ba5546572da1bc6bb6d86729f4e54 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/51nb/x210/devicetree.cb M src/mainboard/asrock/h110m/devicetree.cb M src/mainboard/facebook/monolith/devicetree.cb M src/mainboard/google/eve/devicetree.cb M src/mainboard/google/fizz/variants/baseboard/devicetree.cb M src/mainboard/google/glados/devicetree.cb M src/mainboard/google/poppy/variants/atlas/devicetree.cb M src/mainboard/google/poppy/variants/baseboard/devicetree.cb M src/mainboard/google/poppy/variants/nami/devicetree.cb M src/mainboard/google/poppy/variants/nautilus/devicetree.cb M src/mainboard/google/poppy/variants/nocturne/devicetree.cb M src/mainboard/google/poppy/variants/rammus/devicetree.cb M src/mainboard/google/poppy/variants/soraka/devicetree.cb M src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb M src/mainboard/intel/kunimitsu/devicetree.cb M src/mainboard/libretrend/lt1000/devicetree.cb M src/mainboard/protectli/vault_kbl/devicetree.cb M src/mainboard/purism/librem_skl/devicetree.cb M src/mainboard/razer/blade_stealth_kbl/devicetree.cb M src/mainboard/supermicro/x11-lga1151-series/devicetree.cb M src/soc/intel/skylake/chip.h M src/soc/intel/skylake/irq.c 22 files changed, 12 insertions(+), 206 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/43851/2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43851 )
Change subject: skylake boards: Factor out copy-pasted PIRQ routes ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/c/coreboot/+/43851/1/src/soc/intel/skylake/irq.c File src/soc/intel/skylake/irq.c:
https://review.coreboot.org/c/coreboot/+/43851/1/src/soc/intel/skylake/irq.c... PS1, Line 247: pirqa_routing
remove from chip. […]
Good catch, I forgot.
https://review.coreboot.org/c/coreboot/+/43851/1/src/soc/intel/skylake/irq.c... PS1, Line 257: : for (irq_dev = all_devices; irq_dev; irq_dev = irq_dev->next) { : u8 int_pin = 0, int_line = 0; : : if (!irq_dev->enabled || irq_dev->path.type != DEVICE_PATH_PCI) : continue; : : int_pin = pci_read_config8(irq_dev, PCI_INTERRUPT_PIN); : : switch (int_pin) { : case 1: /* INTA# */ : int_line = config->pirqa_routing; : break; : case 2: /* INTB# */ : int_line = config->pirqb_routing; : break; : case 3: /* INTC# */ : int_line = config->pirqc_routing; : break; : case 4: /* INTD# */ : int_line = config->pirqd_routing; : break; : } : : if (!int_line) : continue; : : pci_write_config8(irq_dev, PCI_INTERRUPT_LINE, int_line); : }
Should we just kill this? If you compare the results with reasonable values […]
We can do that later. This patch allows us to treat these as not mainboard-specific 😊
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43851 )
Change subject: skylake boards: Factor out copy-pasted PIRQ routes ......................................................................
Patch Set 2:
Patch Set 1:
(1 comment)
Just a note, that on the KBL-U board [1], Linux does not list IRQ 11 in `/proc/interrupts` with the vendor firmware.
You would have to disable APICs (and I guess SMP) to make use of these PIRQ routes.
Sorry for being ignorant. Just wanted to note, that the vendor firmware does not expose it, but with coreboot Linux says, an IRQ 11 was received. (The port is work in progress, though it might be unrelated.)
[1]: https://review.coreboot.org/c/coreboot/+/43760/12#message-ba4420a9135b2f3f28...
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43851 )
Change subject: skylake boards: Factor out copy-pasted PIRQ routes ......................................................................
Patch Set 2:
Just a note, that on the KBL-U board [1], Linux does not list IRQ 11 in `/proc/interrupts` with the vendor firmware.
You would have to disable APICs (and I guess SMP) to make use of these PIRQ routes.
Sorry for being ignorant. Just wanted to note, that the vendor firmware does not expose it, but with coreboot Linux says, an IRQ 11 was received. (The port is work in progress, though it might be unrelated.)
That just says something triggered IRQ 11. There are many more things beside PIRQ that go there. If Linux is in APIC mode (it should be, can be seen earlier in the log), PIRQs go to IRQs 16..23.
Hello Felix Singer, build bot (Jenkins), Michał Żygowski, Frans Hendriks, Michael Niewöhner, Patrick Rudolph, Wim Vervoorn, Piotr Król,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43851
to look at the new patch set (#3).
Change subject: skylake boards: Factor out copy-pasted PIRQ routes ......................................................................
skylake boards: Factor out copy-pasted PIRQ routes
Put them in common code just in case something depends on the values.
Change-Id: Ief526efcbd5ba5546572da1bc6bb6d86729f4e54 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/51nb/x210/devicetree.cb M src/mainboard/asrock/h110m/devicetree.cb M src/mainboard/facebook/monolith/devicetree.cb M src/mainboard/google/eve/devicetree.cb M src/mainboard/google/fizz/variants/baseboard/devicetree.cb M src/mainboard/google/glados/devicetree.cb M src/mainboard/google/poppy/variants/atlas/devicetree.cb M src/mainboard/google/poppy/variants/baseboard/devicetree.cb M src/mainboard/google/poppy/variants/nami/devicetree.cb M src/mainboard/google/poppy/variants/nautilus/devicetree.cb M src/mainboard/google/poppy/variants/nocturne/devicetree.cb M src/mainboard/google/poppy/variants/rammus/devicetree.cb M src/mainboard/google/poppy/variants/soraka/devicetree.cb M src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb M src/mainboard/intel/kunimitsu/devicetree.cb M src/mainboard/intel/saddlebrook/devicetree.cb M src/mainboard/libretrend/lt1000/devicetree.cb M src/mainboard/protectli/vault_kbl/devicetree.cb M src/mainboard/purism/librem_skl/devicetree.cb M src/mainboard/razer/blade_stealth_kbl/devicetree.cb M src/mainboard/supermicro/x11-lga1151-series/devicetree.cb M src/soc/intel/skylake/chip.h M src/soc/intel/skylake/irq.c 23 files changed, 12 insertions(+), 215 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/43851/3
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43851 )
Change subject: skylake boards: Factor out copy-pasted PIRQ routes ......................................................................
Patch Set 3: Code-Review+2
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43851 )
Change subject: skylake boards: Factor out copy-pasted PIRQ routes ......................................................................
Patch Set 3: Code-Review+2
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43851 )
Change subject: skylake boards: Factor out copy-pasted PIRQ routes ......................................................................
Patch Set 3: Code-Review+2
Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/43851 )
Change subject: skylake boards: Factor out copy-pasted PIRQ routes ......................................................................
skylake boards: Factor out copy-pasted PIRQ routes
Put them in common code just in case something depends on the values.
Change-Id: Ief526efcbd5ba5546572da1bc6bb6d86729f4e54 Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/43851 Reviewed-by: Nico Huber nico.h@gmx.de Reviewed-by: Arthur Heymans arthur@aheymans.xyz Reviewed-by: Michael Niewöhner Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/51nb/x210/devicetree.cb M src/mainboard/asrock/h110m/devicetree.cb M src/mainboard/facebook/monolith/devicetree.cb M src/mainboard/google/eve/devicetree.cb M src/mainboard/google/fizz/variants/baseboard/devicetree.cb M src/mainboard/google/glados/devicetree.cb M src/mainboard/google/poppy/variants/atlas/devicetree.cb M src/mainboard/google/poppy/variants/baseboard/devicetree.cb M src/mainboard/google/poppy/variants/nami/devicetree.cb M src/mainboard/google/poppy/variants/nautilus/devicetree.cb M src/mainboard/google/poppy/variants/nocturne/devicetree.cb M src/mainboard/google/poppy/variants/rammus/devicetree.cb M src/mainboard/google/poppy/variants/soraka/devicetree.cb M src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb M src/mainboard/intel/kunimitsu/devicetree.cb M src/mainboard/intel/saddlebrook/devicetree.cb M src/mainboard/libretrend/lt1000/devicetree.cb M src/mainboard/protectli/vault_kbl/devicetree.cb M src/mainboard/purism/librem_skl/devicetree.cb M src/mainboard/razer/blade_stealth_kbl/devicetree.cb M src/mainboard/supermicro/x11-lga1151-series/devicetree.cb M src/soc/intel/skylake/chip.h M src/soc/intel/skylake/irq.c 23 files changed, 12 insertions(+), 215 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Arthur Heymans: Looks good to me, approved Michael Niewöhner: Looks good to me, approved
diff --git a/src/mainboard/51nb/x210/devicetree.cb b/src/mainboard/51nb/x210/devicetree.cb index b610904..8e775b5 100644 --- a/src/mainboard/51nb/x210/devicetree.cb +++ b/src/mainboard/51nb/x210/devicetree.cb @@ -71,15 +71,6 @@
register "serirq_mode" = "SERIRQ_CONTINUOUS"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - register "PmConfigPciClockRun" = "1"
# Enable Root Ports 3, 4 and 9 diff --git a/src/mainboard/asrock/h110m/devicetree.cb b/src/mainboard/asrock/h110m/devicetree.cb index 1327a36..977fa29 100644 --- a/src/mainboard/asrock/h110m/devicetree.cb +++ b/src/mainboard/asrock/h110m/devicetree.cb @@ -42,15 +42,6 @@ register "DspEnable" = "0" register "PchHdaVcType" = "Vc1"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # Set LPC Serial IRQ mode register "serirq_mode" = "SERIRQ_CONTINUOUS"
diff --git a/src/mainboard/facebook/monolith/devicetree.cb b/src/mainboard/facebook/monolith/devicetree.cb index 102450a..751da3e 100644 --- a/src/mainboard/facebook/monolith/devicetree.cb +++ b/src/mainboard/facebook/monolith/devicetree.cb @@ -62,15 +62,6 @@ [7] = 0, \ }"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # Enabling SLP_S3#, SLP_S4#, SLP_SUS and SLP_A Stretch # SLP_S3 Minimum Assertion Width. Values 0: 60us, 1: 1ms, 2: 50ms, 3: 2s register "PmConfigSlpS3MinAssert" = "2" diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb index 3b1f22c..e26128d 100644 --- a/src/mainboard/google/eve/devicetree.cb +++ b/src/mainboard/google/eve/devicetree.cb @@ -62,15 +62,6 @@ register "PmConfigSlpAMinAssert" = "3" # 2s register "PmTimerDisabled" = "1"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ #| Domain/Setting | SA | IA | GTUS | GTS | diff --git a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb index b8455fe..d959b81 100644 --- a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb @@ -98,15 +98,6 @@ # send VR mailbox command for IA/GT/SA rails register "IslVrCmd" = "2"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ #| Domain/Setting | SA | IA | GTUS | GTS | diff --git a/src/mainboard/google/glados/devicetree.cb b/src/mainboard/google/glados/devicetree.cb index f7be80d..84e9693 100644 --- a/src/mainboard/google/glados/devicetree.cb +++ b/src/mainboard/google/glados/devicetree.cb @@ -64,15 +64,6 @@ register "PmConfigSlpAMinAssert" = "3" # 2s register "PmTimerDisabled" = "1"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # Enable Root port 1 register "PcieRpEnable[0]" = "1" # Enable CLKREQ# diff --git a/src/mainboard/google/poppy/variants/atlas/devicetree.cb b/src/mainboard/google/poppy/variants/atlas/devicetree.cb index ce943c4..d54f716 100644 --- a/src/mainboard/google/poppy/variants/atlas/devicetree.cb +++ b/src/mainboard/google/poppy/variants/atlas/devicetree.cb @@ -77,15 +77,6 @@ }" register "tcc_offset" = "10"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ #| Domain/Setting | SA | IA | GTUS | GTS | diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb index d57070e..f270b19 100644 --- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb @@ -59,15 +59,6 @@ register "PmConfigSlpAMinAssert" = "3" # 2s register "PmTimerDisabled" = "1"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ #| Domain/Setting | SA | IA | GTUS | GTS | diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb index a4dcad0..78c7d36 100644 --- a/src/mainboard/google/poppy/variants/nami/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb @@ -62,15 +62,6 @@ # send VR mailbox command for IA/GT/SA rails register "IslVrCmd" = "2"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ #| Domain/Setting | SA | IA | GTUS | GTS | diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb index a5f997a..7812646 100644 --- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb @@ -59,15 +59,6 @@ register "PmConfigSlpAMinAssert" = "3" # 2s register "PmTimerDisabled" = "1"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # VR Slew rate setting for improving audible noise register "AcousticNoiseMitigation" = "1" register "FastPkgCRampDisableIa" = "1" diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb index 8819350..2eb7bd2 100644 --- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb @@ -73,15 +73,6 @@ }" register "tcc_offset" = "10"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ #| Domain/Setting | SA | IA | GTUS | GTS | diff --git a/src/mainboard/google/poppy/variants/rammus/devicetree.cb b/src/mainboard/google/poppy/variants/rammus/devicetree.cb index de7023d..531e30d 100644 --- a/src/mainboard/google/poppy/variants/rammus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/rammus/devicetree.cb @@ -69,15 +69,6 @@ register "PmConfigSlpAMinAssert" = "3" # 2s register "PmTimerDisabled" = "1"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ #| Domain/Setting | SA | IA | GTUS | GTS | diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb index 8c22ade..03f2979 100644 --- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb +++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb @@ -59,15 +59,6 @@ register "PmConfigSlpAMinAssert" = "3" # 2s register "PmTimerDisabled" = "1"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ #| Domain/Setting | SA | IA | GTUS | GTS | diff --git a/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb index b14fe31..b7e1cc0 100644 --- a/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb +++ b/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb @@ -32,15 +32,6 @@ register "SaGv" = "SaGv_Enabled" register "PchHdaVcType" = "Vc1"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # Enabling SLP_S3#, SLP_S4#, SLP_SUS and SLP_A Stretch # SLP_S3 Minimum Assertion Width. Values 0: 60us, 1: 1ms, 2: 50ms, 3: 2s register "PmConfigSlpS3MinAssert" = "2" diff --git a/src/mainboard/intel/kunimitsu/devicetree.cb b/src/mainboard/intel/kunimitsu/devicetree.cb index acd197b..51ff562 100644 --- a/src/mainboard/intel/kunimitsu/devicetree.cb +++ b/src/mainboard/intel/kunimitsu/devicetree.cb @@ -37,15 +37,6 @@ register "SaGv" = "SaGv_Enabled" register "PmTimerDisabled" = "1"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # Enabling SLP_S3#, SLP_S4#, SLP_SUS and SLP_A Stretch # SLP_S3 Minimum Assertion Width. Values 0: 60us, 1: 1ms, 2: 50ms, 3: 2s register "PmConfigSlpS3MinAssert" = "0x02" diff --git a/src/mainboard/intel/saddlebrook/devicetree.cb b/src/mainboard/intel/saddlebrook/devicetree.cb index 9243d55..d3ca269 100644 --- a/src/mainboard/intel/saddlebrook/devicetree.cb +++ b/src/mainboard/intel/saddlebrook/devicetree.cb @@ -175,15 +175,6 @@
# Must leave UART0 enabled or SD/eMMC will not work as PCI
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - register "EnableSata" = "1" register "SataSalpSupport" = "1" register "SataPortsEnable" = "{ \ diff --git a/src/mainboard/libretrend/lt1000/devicetree.cb b/src/mainboard/libretrend/lt1000/devicetree.cb index 95874bb..dabef4b 100644 --- a/src/mainboard/libretrend/lt1000/devicetree.cb +++ b/src/mainboard/libretrend/lt1000/devicetree.cb @@ -69,15 +69,6 @@ register "PmConfigSlpAMinAssert" = "3" # 2s register "PmTimerDisabled" = "1"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------------+-------+ #| Domain/Setting | SA | IA | GT-Unsliced | GT | diff --git a/src/mainboard/protectli/vault_kbl/devicetree.cb b/src/mainboard/protectli/vault_kbl/devicetree.cb index bb408a4..5f757e8 100644 --- a/src/mainboard/protectli/vault_kbl/devicetree.cb +++ b/src/mainboard/protectli/vault_kbl/devicetree.cb @@ -60,15 +60,6 @@ register "PmConfigSlpSusMinAssert" = "1" # 500ms register "PmConfigSlpAMinAssert" = "3" # 2s
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ #| Domain/Setting | SA | IA | GTUS | GTS | diff --git a/src/mainboard/purism/librem_skl/devicetree.cb b/src/mainboard/purism/librem_skl/devicetree.cb index d44d2ad..51f6ba4 100644 --- a/src/mainboard/purism/librem_skl/devicetree.cb +++ b/src/mainboard/purism/librem_skl/devicetree.cb @@ -78,15 +78,6 @@ # EC/KBC requires continuous mode register "serirq_mode" = "SERIRQ_CONTINUOUS"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # VR Settings Configuration for 4 Domains #+----------------+-----------+-----------+-------------+----------+ #| Domain/Setting | SA | IA | GT Unsliced | GT | diff --git a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb index 7d54d33..dc7c42b 100644 --- a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb +++ b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb @@ -57,15 +57,6 @@
register "serirq_mode" = "SERIRQ_CONTINUOUS"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # VR Settings Configuration for 4 Domains #+----------------+-----------+-----------+-------------+----------+ #| Domain/Setting | SA | IA | GT Unsliced | GT | diff --git a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb index 0dd37ee..0447e70 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb +++ b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb @@ -15,15 +15,6 @@ register "Device4Enable" = "1" register "SaGv" = "SaGv_Disabled"
- register "pirqa_routing" = "PCH_IRQ11" - register "pirqb_routing" = "PCH_IRQ10" - register "pirqc_routing" = "PCH_IRQ11" - register "pirqd_routing" = "PCH_IRQ11" - register "pirqe_routing" = "PCH_IRQ11" - register "pirqf_routing" = "PCH_IRQ11" - register "pirqg_routing" = "PCH_IRQ11" - register "pirqh_routing" = "PCH_IRQ11" - # SATA configuration register "SataMode" = "KBLFSP_SATA_MODE_AHCI" register "EnableSata" = "1" diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h index 92cd1ba..0545840 100644 --- a/src/soc/intel/skylake/chip.h +++ b/src/soc/intel/skylake/chip.h @@ -49,19 +49,6 @@ GPU_BACKLIGHT_POLARITY_LOW, } gpu_pch_backlight_polarity;
- /* - * Interrupt Routing configuration - * If bit7 is 1, the interrupt is disabled. - */ - uint8_t pirqa_routing; - uint8_t pirqb_routing; - uint8_t pirqc_routing; - uint8_t pirqd_routing; - uint8_t pirqe_routing; - uint8_t pirqf_routing; - uint8_t pirqg_routing; - uint8_t pirqh_routing; - /* Gpio group routed to each dword of the GPE0 block. Values are * of the form GPP_[A:G] or GPD. */ uint8_t gpe0_dw0; /* GPE0_31_0 STS/EN */ diff --git a/src/soc/intel/skylake/irq.c b/src/soc/intel/skylake/irq.c index dbc172f..129f132 100644 --- a/src/soc/intel/skylake/irq.c +++ b/src/soc/intel/skylake/irq.c @@ -240,18 +240,17 @@
void soc_pch_pirq_init(const struct device *dev) { - const config_t *config = config_of(dev); uint8_t pch_interrupt_routing[MAX_PXRC_CONFIG]; struct device *irq_dev;
- pch_interrupt_routing[0] = config->pirqa_routing; - pch_interrupt_routing[1] = config->pirqb_routing; - pch_interrupt_routing[2] = config->pirqc_routing; - pch_interrupt_routing[3] = config->pirqd_routing; - pch_interrupt_routing[4] = config->pirqe_routing; - pch_interrupt_routing[5] = config->pirqf_routing; - pch_interrupt_routing[6] = config->pirqg_routing; - pch_interrupt_routing[7] = config->pirqh_routing; + pch_interrupt_routing[0] = PCH_IRQ11; + pch_interrupt_routing[1] = PCH_IRQ10; + pch_interrupt_routing[2] = PCH_IRQ11; + pch_interrupt_routing[3] = PCH_IRQ11; + pch_interrupt_routing[4] = PCH_IRQ11; + pch_interrupt_routing[5] = PCH_IRQ11; + pch_interrupt_routing[6] = PCH_IRQ11; + pch_interrupt_routing[7] = PCH_IRQ11;
itss_irq_init(pch_interrupt_routing);
@@ -265,16 +264,16 @@
switch (int_pin) { case 1: /* INTA# */ - int_line = config->pirqa_routing; + int_line = pch_interrupt_routing[0]; break; case 2: /* INTB# */ - int_line = config->pirqb_routing; + int_line = pch_interrupt_routing[1]; break; case 3: /* INTC# */ - int_line = config->pirqc_routing; + int_line = pch_interrupt_routing[2]; break; case 4: /* INTD# */ - int_line = config->pirqd_routing; + int_line = pch_interrupt_routing[3]; break; }