Attention is currently required from: Ashish Kumar Mishra, Subrata Banik.
Jérémy Compostella has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/83946?usp=email )
Change subject: soc/intel/common/block/cpu: Use the effective way size for NEM+
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Patch Set 10:
(1 comment)
File src/soc/intel/common/block/cpu/car/cache_as_ram.S:
https://review.coreboot.org/c/coreboot/+/83946/comment/aef0fba1_904ecfbc?usp... :
PS4, Line 498: INTEL_CAR_ENEM_USE_EFFECTIVE_WAY_SIZE
I am limiting the Way Size to the Effective Way Size allowing me to compute the Max NEM Size. […]
why would we consider the # of active cores ? This is just about complying with the ADL EDS or the MTL HAS when computing the way size / NEM size.
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