Change in coreboot[master]: soc/intel/skylake: Add function to clear PMCON status bits

[Sridhar Siricilla (Code Review)]

Attention is currently required from: Subrata Banik, Matt DeVillier, Tim Wawrzynczak, Angel Pons, Nick Vaccaro, Patrick Rudolph, EricR Lai.
Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61650 )

Change subject: soc/intel/skylake: Add function to clear PMCON status bits
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Patch Set 1:

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/61650/comment/7aaefdce_34f0c9d3 
PS1, Line 9: This patch adds function to `clear PMCON status bits` into SoC directory
nit: This patch adds SoC function to clear GEN_PMCON_A status bits

File src/soc/intel/skylake/pmutil.c:

https://review.coreboot.org/c/coreboot/+/61650/comment/46fcbccd_2ea95cbe 
PS1, Line 276: 	/* Clear SUS_PWR_FLR, GBL_RST_STS, HOST_RST_STS, PWR_FLR bits
             : 	 * while retaining MS4V write-1-to-clear bit */
nit: Please format the comment.