[M] Change in coreboot[master]: soc/intel: Add node_num to dimm_info struct + adjust dimm_info_fill

[Angel Pons (Code Review)]

Attention is currently required from: Jonathan Zhang, Arthur Heymans, Andrey Petrov, Tarun Tuli, Anjaneya "Reddy" Chagam, Subrata Banik, Johnny Lin, Christian Walter, Kapil Porwal, Tim Wawrzynczak, Lean Sheng Tan, Werner Zeh, David Milosevic, Tim Chu.

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68525 )

Change subject: soc/intel: Add node_num to dimm_info struct + adjust dimm_info_fill
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Patch Set 3: Code-Review+1

(2 comments)

Patchset:

PS2:
> I've tested it with coreboot's upstream FSP repository and it seems to work... […]

Oh, sorry for the confusion. We don't have any dependencies on FSP. The problem we have is that on a DDR5 system (mb/prodrive/atlas) with 2 SO-DIMMs, the SMBIOS tables report the same locators for the DIMMs. This is because both SO-DIMMs are on "Channel 0 Slot 0", but one is on Memory Controller 0 and the other one is on Memory Controller 1.

This change shouldn't make any meaningful difference on its own, because the `node_num` field is not consumed (yet).

File src/include/memory_info.h:

https://review.coreboot.org/c/coreboot/+/68525/comment/0fbf54fc_774468e3 
PS3, Line 98: 	uint8_t node_num;
Could you please move this next to the `channel_num` and `dimm_num` fields?