Attention is currently required from: Jeremy Soller, Tim Wawrzynczak, Patrick Rudolph. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56949 )
Change subject: soc/intel/tigerlake: Add TGL-H PEG ports ......................................................................
Patch Set 2:
(4 comments)
File src/soc/intel/tigerlake/romstage/fsp_params.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-126485): https://review.coreboot.org/c/coreboot/+/56949/comment/f4b25ef9_0662ec70 PS2, Line 195: if (is_devfn_enabled(SA_DEVFN_CPU_PCIE)) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-126485): https://review.coreboot.org/c/coreboot/+/56949/comment/a19ddc3f_0b2c7f2f PS2, Line 198: if (is_devfn_enabled(SA_DEVFN_PEG1)) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-126485): https://review.coreboot.org/c/coreboot/+/56949/comment/3e45c14a_d0b7e130 PS2, Line 201: if (is_devfn_enabled(SA_DEVFN_PEG2)) { braces {} are not necessary for single statement blocks
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-126485): https://review.coreboot.org/c/coreboot/+/56949/comment/493764ef_bb2c20db PS2, Line 204: if (is_devfn_enabled(SA_DEVFN_PEG3)) { braces {} are not necessary for single statement blocks