Martin Roth has uploaded this change for review. ( https://review.coreboot.org/25635
Change subject: soc/amd/stoneyridge: add a romstage hook for mainboards ......................................................................
soc/amd/stoneyridge: add a romstage hook for mainboards
There wasn't previously a way for Stoney platforms to run mainboard specific code in romstage. This adds an early call for configuration and passes along whether the system is currently resuming from S3.
BUG=b:77921345 TEST=Build, verify that weak function implementation gets called.
Change-Id: Id94855e1084814ec37956e603cd093d70f01a559 Signed-off-by: Martin Roth martinroth@chromium.org --- A src/soc/amd/stoneyridge/include/soc/romstage.h M src/soc/amd/stoneyridge/romstage.c 2 files changed, 29 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/25635/1
diff --git a/src/soc/amd/stoneyridge/include/soc/romstage.h b/src/soc/amd/stoneyridge/include/soc/romstage.h new file mode 100644 index 0000000..af30fd9 --- /dev/null +++ b/src/soc/amd/stoneyridge/include/soc/romstage.h @@ -0,0 +1,21 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018 Google, LLC. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __STONEYRIDGE_ROMSTAGE_H__ +#define __STONEYRIDGE_ROMSTAGE_H__ + +void mainboard_romstage_entry(int s3_resume); + +#endif /* __STONEYRIDGE_ROMSTAGE_H__ */ diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c index cb24756..6c9726a 100644 --- a/src/soc/amd/stoneyridge/romstage.c +++ b/src/soc/amd/stoneyridge/romstage.c @@ -30,9 +30,15 @@ #include <amdblocks/agesawrapper.h> #include <amdblocks/agesawrapper_call.h> #include <soc/northbridge.h> +#include <soc/romstage.h> #include <soc/southbridge.h> #include <amdblocks/psp.h>
+void __attribute__((weak)) mainboard_romstage_entry(int s3_resume) +{ + /* By default, don't do anything */ +} + asmlinkage void car_stage_entry(void) { struct postcar_frame pcf; @@ -53,6 +59,8 @@
console_init();
+ mainboard_romstage_entry(s3_resume); + if (!s3_resume) { post_code(0x40); do_agesawrapper(agesawrapper_amdinitpost, "amdinitpost");