[XS] Change in coreboot[main]: skl mainboards/dt: Drop ScsEmmcHs400Enabled setting if disabled

[Felix Singer (Code Review)]

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83174?usp=email )

Change subject: skl mainboards/dt: Drop ScsEmmcHs400Enabled setting if disabled
......................................................................

skl mainboards/dt: Drop ScsEmmcHs400Enabled setting if disabled

The attributes are initialized with 0 and thus setting them to 0 makes
them superfluous. Remove them.

Change-Id: I1239132d5f25345ebb051d216e9187f3d2250339
Signed-off-by: Felix Singer 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83174
Reviewed-by: Marvin Evers 
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
---
M src/mainboard/51nb/x210/devicetree.cb
M src/mainboard/google/fizz/variants/baseboard/devicetree.cb
M src/mainboard/intel/saddlebrook/devicetree.cb
M src/mainboard/libretrend/lt1000/devicetree.cb
M src/mainboard/protectli/vault_kbl/devicetree.cb
M src/mainboard/purism/librem_skl/devicetree.cb
M src/mainboard/razer/blade_stealth_kbl/devicetree.cb
7 files changed, 0 insertions(+), 7 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved
  Marvin Evers: Looks good to me, but someone else must approve

diff --git a/src/mainboard/51nb/x210/devicetree.cb b/src/mainboard/51nb/x210/devicetree.cb
index 83f8e6e..17a5f75 100644
--- a/src/mainboard/51nb/x210/devicetree.cb
+++ b/src/mainboard/51nb/x210/devicetree.cb
@@ -44,7 +44,6 @@
    register "SataPortsDevSlp[2]" = "1"
    register "DspEnable" = "0"
    register "IoBufferOwnership" = "0"
-	register "ScsEmmcHs400Enabled" = "0"
    register "SkipExtGfxScan" = "1"
    register "SaGv" = "SaGv_Enabled"
    register "PmConfigSlpS3MinAssert" = "2"		# 50ms
diff --git a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb
index c6ec085..3a11a84 100644
--- a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb
@@ -71,7 +71,6 @@
    register "SataPortsDevSlp[1]" = "1"
    register "DspEnable" = "1"
    register "IoBufferOwnership" = "3"
-	register "ScsEmmcHs400Enabled" = "0"
    register "SkipExtGfxScan" = "1"
    register "SaGv" = "SaGv_Enabled"
    register "PmConfigSlpS3MinAssert" = "2"        # 50ms
diff --git a/src/mainboard/intel/saddlebrook/devicetree.cb b/src/mainboard/intel/saddlebrook/devicetree.cb
index 6756d83..d888de4 100644
--- a/src/mainboard/intel/saddlebrook/devicetree.cb
+++ b/src/mainboard/intel/saddlebrook/devicetree.cb
@@ -17,7 +17,6 @@
    # FSP Configuration
    register "DspEnable" = "1"
    register "IoBufferOwnership" = "3"
-	register "ScsEmmcHs400Enabled" = "0"
    register "SkipExtGfxScan" = "1"

# Enabling SLP_S3#, SLP_S4#, SLP_SUS and SLP_A Stretch
diff --git a/src/mainboard/libretrend/lt1000/devicetree.cb b/src/mainboard/libretrend/lt1000/devicetree.cb
index 9c4a366..6725a91 100644
--- a/src/mainboard/libretrend/lt1000/devicetree.cb
+++ b/src/mainboard/libretrend/lt1000/devicetree.cb
@@ -47,7 +47,6 @@
    register "SataSpeedLimit" = "2"
    register "DspEnable" = "1"
    register "IoBufferOwnership" = "0"
-	register "ScsEmmcHs400Enabled" = "0"
    register "SkipExtGfxScan" = "1"
    register "SaGv" = "SaGv_Enabled"
    register "PmConfigSlpS3MinAssert" = "2"        # 50ms
diff --git a/src/mainboard/protectli/vault_kbl/devicetree.cb b/src/mainboard/protectli/vault_kbl/devicetree.cb
index 503a491..6ce7aa4 100644
--- a/src/mainboard/protectli/vault_kbl/devicetree.cb
+++ b/src/mainboard/protectli/vault_kbl/devicetree.cb
@@ -31,7 +31,6 @@
    register "SataSalpSupport" = "0"
    register "DspEnable" = "0"
    register "IoBufferOwnership" = "0"
-	register "ScsEmmcHs400Enabled" = "0"
    register "SkipExtGfxScan" = "1"
    register "SaGv" = "SaGv_Enabled"
    register "IslVrCmd" = "2"
diff --git a/src/mainboard/purism/librem_skl/devicetree.cb b/src/mainboard/purism/librem_skl/devicetree.cb
index acff282..be5b6c0 100644
--- a/src/mainboard/purism/librem_skl/devicetree.cb
+++ b/src/mainboard/purism/librem_skl/devicetree.cb
@@ -49,7 +49,6 @@
    register "SataPortsDevSlp[2]" = "0"
    register "DspEnable" = "0"
    register "IoBufferOwnership" = "0"
-	register "ScsEmmcHs400Enabled" = "0"
    register "SkipExtGfxScan" = "1"
    register "SaGv" = "SaGv_Enabled"
    register "PmConfigSlpS3MinAssert" = "2"		# 50ms
diff --git a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb
index e405114..8694838 100644
--- a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb
+++ b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb
@@ -30,7 +30,6 @@
    }"
    register "DspEnable" = "0"
    register "IoBufferOwnership" = "0"
-	register "ScsEmmcHs400Enabled" = "0"
    register "SkipExtGfxScan" = "1"
    register "SaGv" = "SaGv_Enabled"
    register "PmConfigSlpS3MinAssert" = "2"		# 50ms