[S] Change in coreboot[master]: soc/mediatek/mt8186: Lower SPI NOR frequency from 52Mhz to 39Mhz - coreboot-gerrit

21 Oct 2022


      Attention is currently required from: Hung-Te Lin, Bayi Cheng, Rex-BC Chen, Yu-Ping Wu.
Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68659 )
Change subject: soc/mediatek/mt8186: Lower SPI NOR frequency from 52Mhz to 39Mhz
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Patch Set 2: Code-Review+1
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/68659/comment/c03a4ce3_3ea5cf30 
PS2, Line 10: winbond
please fill the model name
https://review.coreboot.org/c/coreboot/+/68659/comment/7d9226bf_16b00a04 
PS2, Line 14: We change the NOR flash clcok parent and adjust the clock from 52M to
remove this paragraph
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ibcf4549fefa28b2ad9c38e31ec9a69f8afeff3fd
Gerrit-Change-Number: 68659
Gerrit-PatchSet: 2
Gerrit-Owner: Rex-BC Chen rex-bc.chen@mediatek.com
Gerrit-Reviewer: Bayi Cheng bayi.cheng@mediatek.corp-partner.google.com
Gerrit-Reviewer: Hung-Te Lin hungte@chromium.org
Gerrit-Reviewer: Rex-BC Chen rex-bc.chen@mediatek.com
Gerrit-Reviewer: Yidi Lin yidilin@google.com
Gerrit-Reviewer: Yu-Ping Wu yupingso@google.com
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Gerrit-Comment-Date: Fri, 21 Oct 2022 05:43:04 +0000
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